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MAS9191AJ-T 参数 Datasheet PDF下载

MAS9191AJ-T图片预览
型号: MAS9191AJ-T
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片AMPS / ETACS / NAMPS音频/数据处理器 [Single Chip AMPS/ETACS/NAMPS Audio/Data Processor]
分类和应用:
文件页数/大小: 36 页 / 438 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA9191A.000
July 31, 1997
PIN DESCRIPTION
Pin name
RXACCIN
EXPOUT
EWCIN
EAMPOUT
EXPIN
VDAR
VSAR
RBPFOUT
RBPFIN
DEOUT
VREF
RX
ALP
TEST2
TEST1
CLKOUT
TXCTRL
VSS
XTAL2
XTAL1
VDD
TXON
BUSY
XINT
DACOUT3
DACOUT2
DACOUT2
Pin
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Type
AI
AO
AI
AO
AI
P
G
AO
AI
AO
AO
AI
AI
I
I
O
AO
G
O
I
P
O
O
O
AO
AO
AO
Function
RX block extra Op Amp input
Expander output. The expander ratio is 1:2.
Expander window comparator input. Connect a 22nF capacitor between
EWCIN and EAMPOUT.
Expander amplifier output.
Expander input. Connect a 22nF capacitor between EXPIN and
RBPFOUT.
Power supply for RX audio block. Use a bypass capacitor between VDAR
and VSAR.
Ground for RX block. Connect to system ground.
RX bandpass filter output.
RX bandpass filter input. Connect a 22nF capacitor between this pin and
DEOUT
RX de-emphasis filter output. The filter has a -6dB/octave (±1dB)
frequency response in the range 300Hz...3kHz.
Reference voltage. Connect a capacitor between this pin and system
ground.
RX input from RF. This level is 100mVrms at 1kHz.
Audio loop input. Connect through a 22nF capacitor to the TX pin.
Test input. Connect to ground during normal operation.
Test input. Connect to ground during normal operation. If connected to
V
DD
and TEST2 is connected to ground, the external clock can then be
connected to XTAL1.
4.8 MHz clock output from oscillator circuit.
Transmission control output. If a TX collision occurs this open-collector
output is set to low. The TXCTRL will remain low until the TX block is reset
with the TXRST bit or with XRESET.
Digital ground. Connect a bypass capacitor between VSS and VDD.
Crystal oscillator output.
Crystal oscillator input or external clock input if TEST1 is high and TEST2
is low.
Power supply input for digital block.
Transmission detection for debugging. This output indicates when a
transmission is occurring.
Busy/Idle output. Indicates the state of the busy/idle bit.
Active low interrupt output to micro controller. The interrupt is active until
status register 10
HEX
is read.
Output of DAC 3. The DAC output is connected to ground if the DAC is in
power down mode. The output of the DAC is controlled by register 18
HEX
.
Enter the values in two’s complement form into the DAC register.
Output of the DAC 2. The control register is located at 17
HEX
.
Output of the DAC 1. The control register is located at 16
HEX
.
4