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MAS9180 参数 Datasheet PDF下载

MAS9180图片预览
型号: MAS9180
PDF下载: 下载PDF文件 查看货源
内容描述: AM接收器IC [AM Receiver IC]
分类和应用:
文件页数/大小: 15 页 / 278 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA9180.004  
15 September, 2005  
MAS9180 SAMPLES IN SBDIL 20 PACKAGE  
NC  
VDD  
NC  
1
2
3
4
5
20 VSS  
19 NC  
18 RFIM  
17 RFIP  
16 NC  
QOP  
QOM  
NC  
QI  
6
7
8
9
15 NC  
14 PDN  
13 AON  
12 DEC  
11 NC  
Top Marking Definitions:  
YYWW = Year Week  
XXXXX.X = Lot Number  
z=Sample Version Number  
AGC  
NC  
OUT 10  
PIN DESCRIPTION  
Pin Name  
Pin  
Type  
Function  
Note  
NC  
1
VDD  
NC  
QOP  
QOM  
2
3
4
5
P
Positive Power Supply  
Positive Quartz Filter Output for Crystal  
Negative Quartz Filter Output for External  
Compensation Capacitor or Second Crystal  
AO  
5
1
NC  
QI  
6
7
AI  
Quartz Filter Input for Crystal and External  
Compensation Capacitor  
AGC  
NC  
8
9
AO  
AGC Capacitor  
OUT  
NC  
DEC  
AON  
PDN  
NC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
DO  
Receiver Output  
2
AO  
DI  
DI  
Demodulator Capacitor  
AGC On Control  
Power Down Input  
3
4
NC  
RFIP  
RFIM  
NC  
AI  
AI  
Positive Receiver Input  
Negative Receiver Input  
6
6
VSS  
G
Power Supply Ground  
A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected  
Notes:  
1) Pin 6 between QOM and QI must be connected to VSS to eliminate DIL package leadframe parasitic  
capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also  
recommended to be connected to VSS to minimize noise coupling.  
2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated)  
-
-
the output is a current source/sink with |IOUT| > 5 µA  
at power down the output is pulled to VSS (pull down switch)  
3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)  
Internal pull-up with current < 1 µA which is switched off at power down  
4) PDN = VSS means receiver on; PDN = VDD means receiver off  
-
-
Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up  
(PDN=VSS) i.e. at the falling edge of PDN signal.  
5) External crystal compensation capacitor pin QOM is connected only in MAS9190A5 and AF versions. It is left  
unconnected in MAS9180A1 and AB..E versions which have internal compensation capacitor.  
6) Differential input versions A1..A5 have 600 kbiasing MOSFET-transistors towards ground from both  
receiver inputs RFIP and RFIM. Asymmetric input versions AB..AF have input pin RFIM unconnected.  
9 (15)  
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