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MAS9116AASD06 参数 Datasheet PDF下载

MAS9116AASD06图片预览
型号: MAS9116AASD06
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声数字音量控制 [Stereo Digital Volume Control]
分类和应用:
文件页数/大小: 18 页 / 1432 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA9116.005  
22 November, 2005  
GENERAL DESCRIPTION  
recommended not to change the initial test register  
value (00hex) in normal operation. For device testing  
XMUTE pin is bidirectional. When the test register  
bit 1 is high, XMUTE pin is output pin. Internal  
signals can be directed to the pin. Note: In this state  
the analog output is muted and new gain values  
cannot be written into the gain register.  
Main features  
MAS9116 is a stereo digital volume control designed  
for audio systems. The levels of the left and right  
analog channels are set by the serial interface. Both  
channels can be programmed independently.  
Resistor values are decoded to 0.5 dB resolution by  
using internal multiplexers for a gain from –111.5 to  
+15.5 dB. The code for –112 dB activates mute for  
maximum attenuation. MAS9116 operates from  
single +5V supply and accepts input levels up to  
18V.  
Changing the gain of the channel  
When new gain value is written into the gain register  
the chip will activate zero crossing and delay  
generator for the selected channel. MAS9116 will  
wait until rising edge zero crossing is detected in the  
input signal to ensure that there is no audible click  
from the output of amplifier when gain is changed.  
LIN is the input line for the left channel and RIN for  
the right channel. If there are no zero crossings in  
the signal, the gain is changed after typical 18ms  
delay, since then the delay generator will provide  
about 100ns pulse forcing the new value to be  
latched. The delay generator´s delay has variation  
but it is guaranteed that the delay is no longer than  
50ms.  
Interfaces  
Control information is written into or read back from  
the internal register via the serial control port. Serial  
control port consists of a bi-directional pin for data  
(DATA), chip select pin (XCS) and control clock  
(CCLK) and supports the serial communication  
protocol. All control instructions require two bytes of  
data.  
To shift the data in CCLK must be pulsed 16 times  
when XCS is low. The data is shifted into the serial  
input register on the rising edges of CCLK pulses.  
The first 8 bits contain address information. The  
second byte contains the control word. XCS must  
return to high after the second byte. That is, after the  
16th CCLK XCS must be returned to high. See the  
timing diagram on page 11.  
If new gain value has been written before zero  
crossing or delay generator´s delay have occured  
the previous gain value is overwritten, so the  
previous value is not latched to the output. If it is  
desired that each gain value will be latched to the  
output there should be minimum 50ms delay  
between each gain value writings.  
Programming both gain registers at the same time  
sets gain values first to the right channel and then to  
the left channel.  
The same process takes place for reading the  
information. XCS will remain low for next 16 CCLK  
pulses. The data is shifted out on the falling edges  
of CCLK. When XCS is high, the DATA pin is in high  
impedance state, which enables DATA pins of other  
devices to be multiplexed together.  
Programming gain into left and right channel using  
separate commands causes gain values to be set in  
the same order as the programming. If no zero  
crossings occur in either channel, the firstly written  
channel´s gain is changed after first channel´s delay  
generator´s delay has passed. Only after that  
second channel´s delay generator is started. In  
these conditions the first channel gain is set after  
maximum 50ms delay but second channel is set  
after maximum 50ms+50ms = 100ms delay. To  
guarantee that each written gain value will be set in  
all conditions the maximum programming rate for  
both channel gains separately is thus 1/100ms = 10  
Hz.  
On the PCB board the same DATA and CCLK lines  
can be directed to every MAS9116 chip. If the XCS-  
pin is not active (low), DATA-pin of that chip is in  
high-impedance state. This allows using a simple  
PCB board for multichannel audio systems.  
Operating modes  
When power is first applied, power-on reset  
initializes control registers and sets MAS9116 into  
mute state. The activation of the device requires that  
XMUTE pin is high and a control byte with a greater  
than the default value is written in the gain register. It  
is possible to return to the mute stage either by  
setting XMUTE pin low or writing zero (00hex) to the  
gain register.  
The device has special test register which is used  
only for internal testing of the device. It is strongly  
3 (18)  
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