DA9081.006
1 August, 2005
PIN CONFIGURATION & TOP MARKING FOR PLASTIC TSSOP-16 PACKAGE
VDD
QO2
QO1
NC
QI
AGC
PDN2
OUT
VSS
RFI2
RFIM
RFIP
NC
PDN1
AON
DEC
9081Az
YYWW
Top Marking Definitions:
z = Version Number
YYWW = Year Week
PIN DESCRIPTION
Pin Name
VDD
QO2
QO1
NC
QI
AGC
PDN2
OUT
DEC
AON
PDN1
NC
RFIP
RFIM
RFI2
VSS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Type
P
AO
AO
AI
AO
DI
DO
AO
DI
DI
AI
AI
AI
G
Function
Positive Power Supply
Quartz Filter Output for Crystal 2
Quartz Filter Output for Crystal 1
1
Quartz Filter Input for Crystal and External
Compensation Capacitor
AGC Capacitor
Power Down/Frequency Selection Input 2
Receiver Output
Demodulator Capacitor
AGC On Control
Power Down/Frequency Selection Input 1
Positive Receiver Input
Negative Receiver Input
Receiver Input 2 (for Antenna Capacitor 2)
Power Supply Ground
Note
2
3
4
4
A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected
Notes:
1) Pin 4 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic
capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also
recommended to be connected to VSS to minimize noise coupling.
2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced
(modulated)
-
the output is a current source/sink with |I
OUT
| > 5
µA
-
at power down the output is pulled to VSS (pull down switch)
3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)
- Internal pull-up (to AGC on) with current < 1
µA
which is switched off at power down
4) Differential input versions A1..A5 have 600 kΩ biasing MOSFET-transistors towards ground from both
receiver inputs RFIP and RFIM. Asymmetric input versions AB..AF have input pin RFIM unconnected.
8 (12)
MAS [ MICRO ANALOG SYSTEMS ]
