DA6512.003
2 December, 2016
ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 2.7 V, TA = -40°C to +85°C, typical values at TA = +27°C, unless otherwise specified.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
RMS capacitance
resolution @
CLIN=1.8pF
Difference mode, note 1
TEMPREGEN=0, CLIN=1.8pF
OSR=2048
16.8 (19)
16.5 (25)
15.8 (39)
15.4 (53)
bit (aF)
OSR=1024
OSR=512
OSR=256
RMS capacitance
resolution @
CLIN=4pF
Difference mode, note 1
TEMPREGEN=0, CLIN=4pF
OSR=2048
16.9 (42)
16.1 (69)
15.7 (92)
15.1 (138)
bit (aF)
bit (aF)
bit (aF)
bit (aF)
bit (aF)
OSR=1024
OSR=512
OSR=256
RMS capacitance
resolution @
CLIN=20pF
Difference mode, note 1
TEMPREGEN=0, CLIN=20pF
OSR=2048
16.2 (337)
15.9 (417)
15.5 (546)
14.6 (1010)
OSR=1024
OSR=512
OSR=256
RMS capacitance
resolution @
CLIN=1.8pF
Ratio mode, note 1
TEMPREGEN=0, CLIN=1.8pF
OSR=2048
14.1 (133)
13.5 (196)
13.0 (276)
12.6 (364)
OSR=1024
OSR=512
OSR=256
RMS capacitance
resolution@
Ratio mode, note 1
TEMPREGEN=0, CLIN=4pF
OSR=2048
14.7 (193)
14.4 (227)
14.0 (296)
13.3 (495)
CLIN=4pF
OSR=1024
OSR=512
OSR=256
RMS capacitance
resolution @
CLIN=20pF
Ratio mode, note 1
TEMPREGEN=0, CLIN=20pF
OSR=2048
15.7 (468)
15.6 (513)
15.2 (673)
14.6 (1004)
256
OSR=1024
OSR=512
OSR=256
EEPROM size
bit
EEPROM data
retention
TA = +85 °C
TA = +125 °C
Note 2
10
24
1
years
Note 1. Resolution in bits is calculated as follows: CN_BIT=log(CFS/CN)/log(2)= log(CODEFS/CODEN)/log(2) where CFS and CODEFS are
full scale changing capacitance (CFS=CLIN /0.8) and code range respectively, CN and CODEN are RMS noise in capacitance and code
respectively. Note also that when calculating resolution in bits by ratio of full scale signal range and RMS noise the result can exceed the
number of bits in the ADC. In contrast when using peak to peak signal range and noise values for bit resolution calculation the maximum
possible value is the same as number of bits in the ADC.
Note 2. Data retention values apply when extended EEPROM tests are done. Please contact Micro Analog Systems Oy if the data retention
values here need to be guaranteed by comprehensive EEPROM testing.
6 (32)