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MAS6505BA1WAB05 参数 Datasheet PDF下载

MAS6505BA1WAB05图片预览
型号: MAS6505BA1WAB05
PDF下载: 下载PDF文件 查看货源
内容描述: [Piezoresistive Sensor Signal Interface IC]
分类和应用:
文件页数/大小: 44 页 / 1063 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA6505.005  
11 June 2018  
FUNCTIONAL DESCRIPTION  
Power on reset  
The MAS6505 has power on reset (POR) circuitry  
which resets the device into standby mode after both  
power supplies VDD and VDDIO have risen to  
sufficient levels. The VDD is supply voltage for  
analog and digital blocks and the VDDIO is supply  
voltage for the digital I2C and SPI serial bus  
interface. There are no limitations for the slope and  
sequence of raising of the VDD and VDDIO supplies.  
However it is recommended to reset the device  
manually after every power up to make sure it is  
reset properly. This is accomplished via serial bus by  
writing any data byte to the Reset register  
(EC/6CHEX). See table 1 for MAS6505 memory  
addresses. The POR or writing to the Reset register  
will reset all registers from ED/6DHEX to FF/7FHEX to  
a zero (00HEX) value.  
Digital interface selection  
The MAS605 supports I2C and SPI digital interfaces.  
The I2C interface is a 2-wire serial bus which is  
selected by leaving the CSB pin unconnected  
(floating) or by connecting it to VDDIO. The CSB pin  
has internal 250 kΩ pull-up resistor to VDDIO. Note:  
The 2-wire I2C bus of MAS6505 supports only basic  
I2C bus communication protocol but not for example  
10-bit addressing, arbitration and clock stretching  
features of the I2C bus specification.  
bus mode. To select 3-wire SPI bus mode it is  
necessary to first set WIRE=1 by writing to the  
Configuration register.  
The SPI communication is selected by pulling the  
CSB pin low. It has an additional SPI mode lock in  
feature. By pulling CSB low and giving at least four  
SCK clock pulses makes the digital interface to lock  
into SPI communication mode. This is done in order  
to avoid inadvertently decoding SPI traffic to another  
slave device as I2C data. After entering SPI lock  
mode the I2C communication is possible only after  
applying power on reset.  
The SPI interface supports 3-wire and 4- wire serial  
bus communication. Selection between 3- and 4-  
wire SPI bus modes is done by WIRE bit in the  
Configuration register (EE/6EHEX). See table 3. After  
power up the WIRE=0 which selects the 4-wire SPI  
8 (44)  
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