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MAS6503CA1WAD00 参数 Datasheet PDF下载

MAS6503CA1WAD00图片预览
型号: MAS6503CA1WAD00
PDF下载: 下载PDF文件 查看货源
内容描述: [Piezoresistive Sensor Signal Interface IC]
分类和应用:
文件页数/大小: 34 页 / 1936 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA6503.005  
14 December 2016  
APPLICATION INFORMATION  
VDD rise time < 1ms  
CVDD  
CVREG  
VDD  
VDD  
VDD  
470pF  
1.0µF  
RP  
4.7k  
TE3  
OSC  
VDD  
VREG  
VDD  
RP  
4.7k  
EEPROM  
VREFP  
ADC  
PI  
NI  
P
T
SDA/MOSI  
SENSOR  
I/O  
I/O  
I2C/  
SPI  
MISO  
CONTROL  
P
SCL/SCLK  
XCS  
T
VDD  
VDD  
COMMON  
R3  
VREFN  
XCLR  
EOC  
XSPI  
R1  
I/O  
I/O  
OPTIONAL  
VDD  
R4  
R2  
TEST  
MAS6503  
T
P
T
MCU  
TE1 TE2  
GND  
GND  
GND  
GND  
NOTE: It is recommended to use the XCLR reset feature to solve unexpected error state conditions. In case VDD rise time can  
exceed 1ms the device has to be kept in a reset during power up by using the XCLR pin. Violating this may risk EEPROM integrity.  
If not used the XCLR pin can be left unconnected since it has internal pull up to VDD.  
Figure 11. Typical application circuit configured for I2C bus communication  
Figure 11 presents MAS6503 application circuit using I2C bus and when VDD rise time is guaranteed to be  
always below internal POR circuit delay of 1ms. In case the VDD rise time can exceed 1ms see the next page  
application information.  
Together with a resistive pressure sensor, MAS6503 can be used in pressure measurement applications. An  
external micro-controller can control the MAS6503 via an I2C or a SPI serial interface. Note that the I2C serial  
interface requires suitable pull-up resistors connected to the SDA and SCL pins (see figure 11). If there is only a  
single master device connected to the serial bus the master’s SCL output can be of push-pull type making the  
SCL pull-up resistor unnecessary.  
The sensor is connected between voltage regulator output (VREG) and grounding switch (COMMON) of  
MAS6503. The sensor output is read as a differential signal through PI (positive input) and NI (negative input) to  
the ΔΣ converter in MAS6503.  
When using the internal regulator a 470pF capacitor should be connected between the regulator output VREG  
and GND and a decoupling capacitor of minimum 1F should be used for the supply voltage VDD (see figure  
11). If the internal regulator is disabled a supply voltage decoupling capacitor of 4.7 F or more should be  
placed between VDD and GND to guarantee conversion accuracy.  
28 (34)  
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