DA6181B.003
17 September, 2014
PAD LAYOUT
MAS6181B1
1st bond!
VDD
VSS
RFI2
RFIM
RFIP
QO2
QO1
QI
Do not bond!
PDN1
AON
AGC
PDN2
DEC
OUT
µ
m
1120
DIE size = 1120 x 1530 µm; rectangular PAD 80 µm x 80 µm
Note: Because the substrate of the die is internally connected to VSS, the die has to be connected to VSS or left
floating. Please make sure that VSS is the first pad to be bonded. Pick-and-place and all component assembly
are recommended to be performed in ESD protected area.
Note: Coordinates are pad center points where origin has been located in bottom-left corner of the silicon die.
Pad Identification
Name
X-coordinate
Y-coordinate
Note
Power Supply Voltage
VDD
QO2
QO1
QI
126 µm
126 µm
126 µm
126 µm
126 µm
126 µm
126 µm
994 µm
994 µm
994 µm
994 µm
994 µm
298 µm
400 µm
994 µm
994 µm
1332 µm
1132 µm
962 µm
788 µm
614 µm
440 µm
263 µm
266 µm
450 µm
618 µm
807 µm
985 µm
1025 µm
1025 µm
1163 µm
1321 µm
Quartz Filter Output for Crystal 2
Quartz Filter Output for Crystal 1
Quartz Filter Input for Crystals
AGC Capacitor
AGC
PDN2
OUT
DEC
AON
PDN1
RFIP
RFIM
RFIMB
RFI2B
RFI2
VSS
Power Down/Frequency Selection Input 2
Receiver Output
1
2
Demodulator Capacitor
AGC On Control
3
1
4
4
5
5
Power Down/Frequency Selection Input 1
Positive Receiver Input
Negative Receiver Input
Test pad RFIMB
Test pad RFI2B
Receiver Input 2 (for Antenna Capacitor 2)
Power Supply Ground
Notes:
1) PDN1 = VDD and PDN2 = VDD means receiver off
Fast start-up is triggered when the receiver is after power down controlled to power on
-
2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced
(modulated)
-
The output is a current source/sink with |IOUT| > 5 µA
At power down the output is pulled to VSS (pull down switch)
-
3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (normal operation)
-
Unused AON pad can be left unconnected due to internal pull-up with current < 1 µA. Pull up current is
switched off at power down.
4) Receiver inputs RFIP and RFIM have both 1.4 MΩ biasing resistors towards VDD
5) RFIMB and RFI2B pads are left unconnected. They are only for wafer level testing purposes
2 (14)
MAS [ MICRO ANALOG SYSTEMS ]
