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MAS6180C1UC06 参数 Datasheet PDF下载

MAS6180C1UC06图片预览
型号: MAS6180C1UC06
PDF下载: 下载PDF文件 查看货源
内容描述: [AM Receiver IC]
分类和应用:
文件页数/大小: 12 页 / 279 K
品牌: MAS [ MICRO ANALOG SYSTEMS ]
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DA6180C.001  
17 September, 2014  
MAS6180 PAD LAYOUT  
VSS pad  
bonded first!  
1160 µm  
VDD  
VSS  
RFIM  
QOP  
QOM  
QI  
MAS6180Cx  
RFIP  
PDN  
AON  
DEC  
AGC  
OUT  
DIE size = 1160 µm x 1320 µm; PAD size = 80 µm x 80 µm  
Note: Because the substrate of the die is internally connected to VSS, the die has to be connected to VSS or left  
floating. Please make sure that VSS is the first pad to be bonded. Pick-and-place and all component assembly  
are recommended to be performed in ESD protected area.  
Note: Coordinates are pad center points where origin has been located in bottom-left corner of the silicon die.  
Pad Identification  
Name  
X-coordinate  
Y-coordinate  
Note  
Power Supply Voltage  
Positive Quartz Filter Output  
Negative Quartz Filter Output  
Quartz Filter Input for Crystal  
AGC Capacitor  
VDD  
QOP  
QOM  
QI  
126 µm  
126 µm  
126 µm  
126 µm  
126 µm  
126 µm  
1034 µm  
1034 µm  
1034 µm  
1034 µm  
1034 µm  
1034 µm  
1122 µm  
955 µm  
787 µm  
604 µm  
435 µm  
258 µm  
261 µm  
445 µm  
613 µm  
802 µm  
980 µm  
1111 µm  
1
2
AGC  
OUT  
DEC  
AON  
PDN  
RFIP  
RFIM  
VSS  
Receiver Output  
Demodulator Capacitor  
AGC On Control  
3
4
5
5
Power Down  
Positive Receiver Input  
Negative Receiver Input  
Power Supply Ground  
Notes:  
1) QOM bonding pad is electrically unconnected in MAS6180C1 version  
2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated)  
-
the output is a current source/sink with |IOUT| > 5 µA  
at power down the output is pulled to VSS (pull down switch)  
-
3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)  
Internal pull-up with current < 1 µA which is switched off at power down  
4) PDN = VSS means receiver on; PDN = VDD means receiver off  
-
Fast start-up is triggered when the receiver is after power down (PDN=VDD) controlled to power up  
(PDN=VSS) i.e. at the falling edge of PDN signal.  
5) Receiver inputs RFIP and RFIM have both 1.4 Mbiasing resistors towards VDD  
2 (12)  
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