DA6179.000
22 January, 2007
MAS6179 SAMPLES IN SBDIL 20 PACKAGE
1
VDD 2
QO2 3
QO1 4
20 VSS
19 RFI2
18 RFIM
17 RFIP
16 RFI3
15
QO3
5
6
7
8
QI
14 PDN1
13 AON
12 DEC
11
Top Marking Definitions:
YYWW = Year Week
XXXXX.X = Lot Number
zz = Sample Version
AGC
PDN2 9
OUT 10
PIN DESCRIPTION
Pin Name
Pin
Type
Function
Note
1
NC
VDD
QO2
QO1
QO3
2
3
P
AO
AO
AO
NC
AI
Positive Power Supply
Quartz Filter Output for Crystal 2
Quartz Filter Output for Crystal 1
Quartz Filter Output for Crystal 3
4
5
6
1
QI
7
Quartz Filter Input for Crystal
AGC Capacitor
AGC
PDN2
OUT
8
AO
DI
9
Power Down/Frequency Selection Input 2
Receiver Output
2
3
10
11
12
13
14
15
16
17
18
19
20
DO
NC
AO
DI
DEC
AON
Demodulator Capacitor
AGC On Control
4
2
PDN1
DI
Power Down/Frequency Selection Input 1
NC
AI
RFI3
RFIP
RFIM
RFI2
VSS
Receiver Input 3 (for Antenna Capacitor 3)
Positive Receiver Input
AI
5
5
AI
Negative Receiver Input
AI
Receiver Input 2 (for Antenna Capacitor 2)
Power Supply Ground
G
A = Analog, D = Digital, P = Power, G = Ground, I = Input, O = Output, NC = Not Connected
Notes:
1) Pin 6 between QO3 and QI must be connected to VSS to eliminate DIL package lead frame parasitic
capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also
recommended to be connected to VSS to minimize noise coupling.
2) PDN1 = PDN2 = VDD means receiver off
Fast start-up is triggered when the receiver is after power down controlled to power up
-
3) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced
(modulated)
-
the output is a current source/sink with |IOUT| > 5 µA
at power down the output is pulled to VSS (pull down switch)
-
4) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working)
Internal pull-up with current < 1 µA which is switched off at power down
5) Receiver inputs RFIP and RFIM have both 600 kΩ biasing resistors towards VDD
-
9 (10)
MAS [ MICRO ANALOG SYSTEMS ]
