MCP795WXX/MCP795BXX
The MCP795XXX contains an 8-bit instruction register.
3.0
SPI BUS OPERATION
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low for the entire operation.
The MCP795XXX is designed to interface directly with
the Serial Peripheral Interface (SPI) port of many of
today’s popular microcontroller families, including
Microchip’s PIC® microcontrollers. It may also interface
with microcontrollers that do not have a built-in SPI port
by using discrete I/O lines programmed properly in soft-
ware to match the SPI protocol.
Table 3-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSb first, LSb last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low.
TABLE 3-1:
INSTRUCTION SET SUMMARY
Instruction Name
Instruction Format
Description
EEREAD
EEWRITE
EEWRDI
EEWREN
SRREAD
SRWRITE
READ
0000 0011
0000 0010
0000 0100
0000 0110
0000 0101
0000 0001
0001 0011
0001 0010
Read data from EE memory array beginning at selected address
Write data to EE memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read STATUS register
Write STATUS register
Read RTCC/SRAM array beginning at selected address
WRITE
Write RTCC/SRAM data to memory array beginning at selected
address
UNLOCK
IDWRITE
IDREAD
CLRWDT
CLRRAM
0001 0100
0011 0010
0011 0011
0100 0100
0101 0100
Unlock ID Locations
Write to the ID Locations
Read the ID Locations
Clear Watchdog TImer
Clear RAM Location to ‘0’
the next address can be read sequentially by continu-
ing to provide clock pulses to the slave. The internal
3.1
Read Sequence
The device is selected by pulling CS low. The various
8-bit read instructions are transmitted to the
MCP795XXX followed by an 8-bit address. See
Figure 3-1 for more details.
Address Pointer automatically increments to the next
higher address after each byte of data is shifted out.
When the highest address is reached, the address
counter rolls over to the first valid address allowing the
read cycle to be continued indefinitely. The read oper-
ation is terminated by raising the CS pin (Figure 1-1).
After the correct instruction and address are sent, the
data stored in the memory at the selected address is
shifted out on the SO pin. Data stored in the memory at
FIGURE 3-1:
EEREAD SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9 10 11
12
15 16 17 18
20
19 21 22 23
13 14
SCK
Instruction
Address Byte
1 A7 A6 A5 A4
A2 A1 A0
0
0
0
0
0
0
1
A3
SI
Data Out
High-Impedance
7
6
5
4
3
2
1
0
SO
DS22280A-page 8
Preliminary
2011 Microchip Technology Inc.
MAS [ MICRO ANALOG SYSTEMS ]
