Functional Description
Under Voltage Lockout
3.3.1
Maximum LDO Output Current
The FDS642P is design to provide up to 800 mA of continuous output current. However, the tiny
Super SOT-6 package can dissipate up to 0.7W. If the input and output voltage are close, then the
full 800 mA is achieved (see Figure 11). As the input voltage increases, the IC dissipates more
power, limiting the maximum output current. The output current has to decrease in order to keep the
power dissipation under its 0.7W limit.
Figure 11: Maximum Output Current for the FDS642P P-Channel MOSFET
MaximumLDO Output Current vs. Input Voltage
1.0
0.8
0.6
0.4
0.2
0.0
3
3.5
4
4.5
5
Input Voltage (V)
3.4
3.5
Under Voltage Lockout
At startup, the MVPG15x/MVPG16 incorporates Under Voltage Lockout (UVLO) circuitry to enable
the step-down switching regulator and the LDO controller when the input voltage is above 2.60V
(typical). After the MVPG15x/MVPG16 is enabled and the input voltage is lowered, the highest value
of the minimum input voltage for both regulators to remain enabled is 2.50V (typical).
Over Voltage Protection
The MVPG15x/MVPG16 incorporates an Over Voltage Protection (OVP) circuitry to disable the
step-down switching regulator and LDO controller when the input voltage is above 5.7V (typical).
The step-down switching regulator and LDO controller are enabled when the input voltage is below
5.6V (typical).
Copyright © 2008 Marvell
April 14, 2008, 2.00
Doc. No. MV-S102809-00 Rev. G
Page 29
Document Classification: Proprietary