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MVPG15X 参数 Datasheet PDF下载

MVPG15X图片预览
型号: MVPG15X
PDF下载: 下载PDF文件 查看货源
内容描述: 现场可编程DSP切换™为1 MHz , 1.5A峰值电流限流降压型稳压器,带有AnyVoltage ™技术 [Field Programmable DSP Switcher™ 1 MHz, 1.5A Peak Current-Limit Step-Down Regulator with AnyVoltage™ Technology]
分类和应用: 稳压器
文件页数/大小: 66 页 / 946 K
品牌: MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
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Functional Description  
Output Voltage—AnyVoltage™ Technology  
required to determine the appropriate output voltage. Table 9 provides the number of steps  
necessary for each output voltage option. Using a VSET resistor of 165 kΩ requires the current  
source to step four times, and a PSET resistor of 31.6 kΩ requires seven steps.  
Figure 9: Startup Sequence  
Figure 10: V  
= 2.5V and P  
= -5%  
SET  
SET  
V
2V/DIV  
1V/DIV  
1V/DIV  
1V/DIV  
V
P
IN  
SET  
SET  
500mV/DIV  
500mV/DIV  
m  
V
OUT  
V
P
SET  
SET  
0  
2.0 ms/DIV  
200 μs/DIV  
Table 9: Output Voltage Option Steps  
Step  
VOUT  
(V)  
R
(kΩ)  
Step  
PSET  
(%)  
R
PSET  
(kΩ)  
VSET  
1
2
3
4
5
6
7
8
9
0
0
1
2
3
4
5
6
7
8
9
0
0
3.3  
3.0  
2.5  
1.8  
1.5  
1.2  
1.0  
0.8  
475  
280  
165  
97.6  
53.6  
31.6  
18.7  
11  
+10  
+7.5  
+5.0  
+2.5  
-2.5  
-5.0  
-7.5  
-10  
475  
280  
165  
97.6  
53.6  
31.6  
18.7  
11  
The MVPG15x/MVPG16 provides an innovative technique to set the output voltage. During startup it  
reads the value of external resistors, which are located outside the regulator’s feedback loop to  
program the output voltage. By placing the output voltage programming resistor outside the  
regulator’s feedback loop, its tolerance does not affect the accuracy of the output voltage. Normally,  
adjustable regulators use 1% resistors to set the output voltage. However, these resistors are  
located inside the feedback loop, introducing as much as 2% of initial accuracy error to the output  
voltage, resulting in an overall initial accuracy of 3%. Whereas, the MVPG15x/MVPG16 initial  
accuracy is 2% for any of the eight output voltages.  
The VSET and PSET pins are sensitive to excessive leakage currents and stray capacitance. The  
output voltage can potentially be programmed to the lower output voltage if there is contamination,  
which introduces excessive leakage current on the VSET and PSET pin, especially for the 3.3V  
output or +10%. The parasitic resistance on these nodes must be greater than 3 MΩ and the stray  
capacitance must be less than 25 pF; otherwise, a 3.3V output can potentially end up at 3V.  
Copyright © 2008 Marvell  
April 14, 2008, 2.00  
Doc. No. MV-S102809-00 Rev. G  
Page 27  
Document Classification: Proprietary