Pin Information
Pin Descriptions
2.2.7
USB 2.0 Port Interface Pin Assignments
Table 10: USB 2.0 Ports 0/1/2 Interface Pin Assignments
Pin Name
I/O / Pin Type
Power
Rails
Description
Where <n> represents USB Port0, Port1, or Port2.
USB<n>_DP
USB<n>_DM
I/O
CML
USB0/1/2
_AVDD
USB 2.0 Port0/1/2 data+ and data- pair
2.2.8
SATA II Port Interface Pin Assignments
Table 11: SATA II Port 0/1 Interface Pin Assignments
Pin Name
I/O
Pin
Type
Power
Rails
Description
Port0
SATA0_TX_P
SATA0_TX_N
O
I
CML
SATA0_
AVDD
Transmit data: Differential analog output of SATA II Port0
Receive data: Differential analog input of SATA II Port0
SATA0_RX_P
SATA0_RX_N
CML
SATA0_
AVDD
O
CMOS
VDDO_C
VDDO_C
When this signal is asserted there is an active link between the
SATA II port and the external device (disk).
NOTE: This signal is multiplexed on the MPP pins, see Section 6,
Pin Multiplexing, on page 48.
SATA0_
PRESENTn
O
CMOS
When this signal is asserted, there is an active and used link
between the SATA II port and the external device (disk).
NOTE: This signal is multiplexed on the MPP pins, see Section 6,
Pin Multiplexing, on page 48.
SATA0_ACTn
Port1
SATA1_TX_P
SATA1_TX_N
O
I
CML
SATA1_
AVDD
Transmit data: Differential analog output of SATA II Port1
Receive data: Differential analog input of SATA II Port1
SATA1_RX_P
SATA1_RX_P
CML
SATA1_
AVDD
O
CMOS
VDDO_C
VDDO_C
When this signal is asserted there is an active link between the
SATA II port and the external device (disk).
NOTE: This signal is multiplexed on the MPP pins, see Section 6,
Pin Multiplexing, on page 48.
SATA1_
PRESENTn
O
CMOS
When this signal is asserted, there is an active and used link
between the SATA II port and the external device (disk).
NOTE: This signal is multiplexed on the MPP pins, see Section 6,
Pin Multiplexing, on page 48.
SATA1_ACTn
Copyright © 2008 Marvell
MV-S104671-U0 Rev. C
December 6, 2008, Preliminary
Document Classification: Proprietary Information
Page 35
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
