MV76100
Hardware Specifications
9.6.10
JTAG Interface AC Timing
9.6.10.1
JTAG Interface AC Timing Table
Table 48: JTAG Interface 30 MHz AC Timing Table
30 MHz
Min Max
Description
Symbol
Units
MHz
tCK
V/ns
ms
Notes
JTClk frequency
fCK
Tpw
30.0
-
-
JTClk minimum pulse w idth
0.45
0.50
1.0
0.55
JTClk rise/fall slew rate
Sr/Sf
Trst
-
2
-
JTRSTn active time
-
TMS, TDI input setup relative to JTClk rising edge
TMS, TDI input hold relative to JTClk rising edge
JTClk falling edge to TDO output delay
Tsetup
Thold
Tprop
6.67
13.0
1.0
-
-
ns
-
ns
-
8.33
ns
1
Notes :
General comment: All values w ere measured from vddio/2 to vddio/2, unless otherw ise specified.
General comment: tCK = 1/fCK.
1. For TDO signal, the load is CL = 10 pF.
2. Defined from VIL to VIH for rise time, and from VIH to VIL for fall time.
9.6.10.2
JTAG Interface Test Circuit
Figure 35: JTAG Interface Test Circuit
Test Point
CL
MV-S105424-U0 Rev. B
Page 100
Copyright © 2008 Marvell
Document Classification: Proprietary Information
December 6, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
