Electrical Specifications
9.6.4
Gigabit Media Independent Interface (GMII) AC Timing
9.6.4.1
GMII AC Timing Table
Table 33: GMII AC Timing Table
125 MHz
Description
GTX_CLK cycle time
Symbol
tCK
Min
Max
Units
ns
Notes
7.5
7.5
2.5
2.5
-
8.5
-
-
RX_CLK cycle time
tCKrx
tHIGH
tLOW
tR
-
ns
GTX_CLK and RX_CLK high level w idth
GTX_CLK and RX_CLK low level w idth
GTX_CLK and RX_CLK rise time
-
ns
1
-
ns
1
1.0
ns
1, 2
1, 2
-
GTX_CLK and RX_CLK fall time
tF
-
1.0
ns
Data input setup time relative to RX_CLK rising edge
Data input hold time relative to RX_CLK rising edge
Data output valid before GTX_CLK rising edge
Data output valid after GTX_CLK rising edge
tSETUP
tHOLD
tOVB
tOVA
2.0
0.0
2.5
0.5
-
-
-
-
ns
ns
-
ns
1
ns
1
Notes :
General comment: All values w ere measured from VIL(max) to VIH(min), unless otherw ise specified.
1. For all signals, the load is CL = 5 pF.
2. Rise time measured from VIL(max) to VIH(min), fall time measured from VIH(min) to VIL(max).
9.6.4.2
GMII Test Circuit
Figure 13: GMII Test Circuit
Test Point
CL
Copyright © 2008 Marvell
MV-S105424-U0 Rev. B
Page 77
December 6, 2008, Preliminary
Document Classification: Proprietary Information
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
