88F619x
Hardware Specifications
Table 32: 88F6190 Ethernet Ports Pins Multiplexing........................................................................................68
Table 33: 88F6192 Ethernet Ports Pins Multiplexing........................................................................................69
Table 34: TS Port Pin Multiplexing .................................................................................................................70
7
8
9
Clocking.............................................................................................................................................71
Table 35: 88F619x Clocks................................................................................................................................71
Table 36: Supported Clock Combinations ........................................................................................................72
System Power Up/Down and Reset Settings .................................................................................73
Table 37: I/O and Core Voltages ......................................................................................................................73
Table 38: Reset Configuration..........................................................................................................................77
JTAG Interface ..................................................................................................................................83
Table 39: Supported JTAG Instructions............................................................................................................83
Table 40: IDCODE Register Map .....................................................................................................................84
10 Electrical Specifications (Preliminary) ...........................................................................................85
Table 41: Absolute Maximum Ratings..............................................................................................................85
Table 42: Recommended Operating Conditions...............................................................................................87
Table 43: Thermal Power Dissipation...............................................................................................................89
Table 44: Current Consumption........................................................................................................................91
Table 45: General 3.3V Interface (CMOS) DC Electrical Specifications...........................................................92
Table 46: RGMII 1.8V Interface (CMOS) DC Electrical Specifications.............................................................93
Table 47: SDRAM DDR2 Interface DC Electrical Specifications ......................................................................94
Table 48: TWSI Interface 3.3V DC Electrical Specifications.............................................................................95
Table 49: SPI Interface 3.3V DC Electrical Specifications................................................................................95
Table 50: TDM Interface 3.3V DC Electrical Specifications..............................................................................96
Table 51: Reference Clock AC Timing Specifications ......................................................................................97
Table 52: SDRAM DDR2 Interface AC Timing Table .......................................................................................99
Table 53: RGMII 10/100/1000 AC Timing Table at 1.8V ................................................................................102
Table 54: RGMII 10/100 AC Timing Table at 3.3V .........................................................................................102
Table 55: GMII AC Timing Table ....................................................................................................................104
Table 56: MII/MMII MAC Mode AC Timing Table...........................................................................................106
Table 57: SMI Master Mode AC Timing Table................................................................................................108
Table 58: JTAG Interface AC Timing Table....................................................................................................110
Table 59: TWSI Master AC Timing Table.......................................................................................................112
Table 60: TWSI Slave AC Timing Table.........................................................................................................112
Table 61: S/PDIF AC Timing Table ................................................................................................................114
Table 62: Inter-IC Sound (I2S) AC Timing Table............................................................................................116
Table 63: TDM Interface AC Timing Table .....................................................................................................118
Table 64: SPI (Master Mode) AC Timing Table..............................................................................................120
Table 65: SDIO Host in High Speed Mode AC Timing Table .........................................................................122
Table 66: Transport Stream Output Interface AC Timing Table ....................................................................124
Table 67: Transport Stream Input Interface AC Timing Table ........................................................................124
Table 68: PCI Express Interface Differential Reference Clock Characteristics ..............................................127
Table 69: PCI Express Interface Spread Spectrum Requirements.................................................................128
Doc. No. MV-S104987-U0 Rev. F
Page 12
Copyright © 2008 Marvell
Document Classification: Proprietary Information
December 2, 2008, Preliminary
MARVELL [ MARVELL TECHNOLOGY GROUP LTD. ]
