®
LY62256
32K X 8 BIT LOW POWER CMOS SRAM
Rev. 2.9
REVISION HISTORY
Revision Description
Issue Date
Rev. 1.0. Initial Issue
Jul.25.2004
Rev. 2.0. Revised Vcc Range(Vcc=4.5~5.5V => 2.7~5.5V)
Rev. 2.1. Revised ISB1
May.4.2005
May.13.2005
Aug.29.2005
Feb.24.2006
Jul.31.2006
Rev. 2.2
Rev. 2.3
Rev. 2.4
Adding PKG type : skinny P-DIP
Revised VIH(min)=2.4V, VIL(max)=0.6V
Revised VIH(min)=2.4V, VIL(max)=0.6V (VCC=2.7~3.6V)
VIH(min)=2.4V, VIL(max)=0.8V (VCC=4.5~5.5V)
Revised STSOP Package Outline Dimension
Added SL grade
Rev. 2.5
Rev. 2.6
Mar.26.2008
Mar.30.2009
℃
℃
Added ISB1/IDR values when TA = 25 and TA = 40
FEATURES ORDERING INFORMATION
Lead
Revised
&
free and green package available to Green package available
ORDERING INFORMATION
Added packing type in
Revised ISB1(MAX)
Revised VTERM to VT1 and VT2
Revised Test Condition of ISB1/IDR
ABSOLUTE MAXIMUN RATINGS
Deleted TSOLDER in
Rev. 2.7
Dec.18.2009
PACKAGE OUTLINE DIMENSION
Revised
Revised
Revised
Revised
in page 8 & 9
Rev. 2.8
Rev. 2.9
May.7.2010
Aug.25.2010
PACKAGE OUTLINE DIMENSION
ORDERING INFORMATION
in page 10
in page 12
PACKAGE OUTLINE DIMENSION
in page 9
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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