®
LY622568
256K X 8 BIT LOW POWER CMOS SRAM
Rev. 2.4
DATA RETENTION CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX. UNIT
VCC for Data Retention
VDR CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V
1.5
-
-
1
5.5
20
V
LL
A
µ
VCC = 1.5V
℃
℃
-
1
4
25
40
A
µ
CE# ≧ VCC - 0.2V
or CE2 ≦ 0.2V
Other pins at 0.2V or VCC-0.2V
Data Retention Current
IDR
SL
SL
-
-
1
1
4
A
A
µ
15
µ
Chip Disable to Data
Retention Time
Recovery Time
See Data Retention
Waveforms (below)
tCDR
tR
0
-
-
-
-
ns
ns
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1) (CE# controlled)
VDR ≧ 1.5V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Low Vcc Data Retention Waveform (2) (CE2 controlled)
VDR ≧ 1.5V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
CE2 ≦ 0.2V
CE2
VIL
VIL
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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