®
LY61L256
Rev. 1.2
32K X 8 BIT HIGH SPEED CMOS SRAM
PIN DESCRIPTION
SYMBOL
A0 - A14
DECODER
32Kx8
MEMORY ARRAY
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
DQ0 – DQ7
CE#
WE#
OE#
V
CC
V
SS
A0-A14
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
PIN CONFIGURATION
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOJ
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE#
A13
A8
A9
A11
OE#
A10
CE#
I/O8
I/O7
I/O6
I/O5
I/O4
OE#
A11
A9
A8
A13
WE#
Vcc
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE#
I/O8
I/O7
I/O6
I/O5
I/O4
Vss
I/O3
I/O2
I/O1
A0
A1
A2
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
LY61L256
LY61L256
STSOP
2
LYONTEK [ Lyontek Inc. ]
