®
LY61L2568
256K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 0.4
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL TEST CONDITION
VDR CE# ≧ VCC - 0.2V
CC = 2.0V
MIN.
2.0
TYP. MAX. UNIT
-
3.6
V
V
Normal
-
-
0.5
1
mA
Data Retention Current
IDR
CE# ≧ VCC - 0.2V
20/25LL
5
-
40
-
A
µ
Others at 0.2V or VCC - 0.2V
See Data Retention
Waveforms (below)
Chip Disable to Data
Retention Time
tCDR
tR
0
ns
ns
Recovery Time
tRC
-
-
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
LYONTEK [ Lyontek Inc. ]
