®
LY61L1288
Rev. 1.2
128K X 8 BIT HIGH SPEED CMOS SRAM
PIN DESCRIPTION
SYMBOL
A0 - A16
DECODER
128Kx8
MEMORY ARRAY
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
DQ0 – DQ7
CE#
WE#
OE#
V
CC
V
SS
A0-A16
DQ0-DQ7
I/O DATA
CIRCUIT
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
PIN CONFIGURATION
A0
A1
A2
A3
CE#
DQ0
DQ1
Vcc
Vss
DQ2
DQ3
WE#
A4
A5
A6
A7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
LY61L1288
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A16
A15
A14
A13
OE#
DQ7
DQ6
Vss
Vcc
DQ5
DQ4
A12
A11
A10
A9
A8
STSOP
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
Lyontek Inc.
reserves the rights to change the specifications and products without notice.
2
LYONTEK [ Lyontek Inc. ]
