®
LY61L1024
128K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 2.2
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
A0 - A16
Address Inputs
Vcc
Vss
DQ0 – DQ7 Data Inputs/Outputs
CE#, CE2
WE#
OE#
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
128Kx8
MEMORY ARRAY
A0-A16
DECODER
VCC
VSS
Ground
NC
No Connection
I/O DATA
CIRCUIT
DQ0-DQ7
COLUMN I/O
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
PIN CONFIGURATION
NC
A16
A14
A12
A7
1
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Vcc
A15
CE2
WE#
3
4
A11
A9
A8
A13
WE#
CE2
A15
Vcc
NC
1
2
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
Vss
DQ2
DQ1
DQ0
A0
5
A13
A8
3
4
A6
6
5
A5
7
A9
6
7
8
A4
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
8
LY61L1024
9
A3
9
A16
A14
A12
A7
10
11
12
13
14
15
16
A2
10
11
12
13
14
15
16
A1
A6
A1
A0
A5
A2
A3
A4
DQ0
DQ1
DQ2
Vss
TSOP-I/STSOP
SOJ
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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