®
LY61L5128A
512K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.4
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL TEST CONDITION
VDR CE# ≧ VCC - 0.2V
VCC = 1.5V
MIN.
1.5
TYP.
-
MAX.
3.6
UNIT
V
Data Retention Current
IDR
CE# ≧ VCC - 0.2V
-
2
10
mA
Others at 0.2V or Vcc – 0.2V
Chip Disable to Data
Retention Time
Recovery Time
See Data Retention
Waveforms (below)
tCDR
tR
0
-
-
-
-
ns
ns
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
LYONTEK [ Lyontek Inc. ]
