®
LY61L256
32K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 1.4
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Vcc
Vss
A0 - A14
Address Inputs
DQ0 – DQ7 Data Inputs/Outputs
32Kx8
A0-A14
DECODER
MEMORY ARRAY
CE#
WE#
OE#
VCC
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
VSS
Ground
I/O DATA
CIRCUIT
DQ0-DQ7
COLUMN I/O
CE#
WE#
OE#
CONTROL
CIRCUIT
PIN CONFIGURATION
A14
A12
A7
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Vcc
WE#
A13
3
OE#
A11
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE#
I/O8
I/O7
I/O6
I/O5
I/O4
Vss
I/O3
I/O2
I/O1
A0
A6
4
A8
A5
5
A9
A8
A4
6
A11
OE#
A10
CE#
I/O8
I/O7
I/O6
I/O5
I/O4
A13
WE#
Vcc
A14
A12
A7
A6
A5
A4
A3
A3
7
LY61L256
A2
8
A1
9
A0
10
11
12
13
14
A1
A2
I/O1
I/O2
I/O3
Vss
STSOP
SOJ
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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