®
LY61L12816
128K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 1.5
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL
TEST CONDITION
CE# ≧ VCC - 0.2V
CC = 2.0V
MIN.
2.0
TYP. MAX. UNIT
VDR
-
3.6
V
V
Normal
-
-
0.3
1
mA
CE# ≧ VCC - 0.2V
Others at 0.2V or
VCC - 0.2V
Data Retention Current
IDR
15/20/25(LL)
5
30
A
µ
Chip Disable to Data
Retention Time
Recovery Time
See Data Retention
Waveforms (below)
tCDR
tR
0
-
-
-
-
ns
ns
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9
LYONTEK [ Lyontek Inc. ]
