®
LY616416
5V 64K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 1.2
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL
TEST CONDITION
CE# ≧ VCC - 0.2V
VCC = 2.0V, CE# ≧ VCC - 0.2V
other pins at 0.2V or VCC-0.2V
See Data Retention
MIN. TYP. MAX. UNIT
VDR
2.0
-
-
-
5.5
2
50
V
mA
A
µ
15/20
15/20LL
0.05
10
Data Retention Current
IDR
Chip Disable to Data
Retention Time
Recovery Time
tCDR
tR
0
-
-
-
-
ns
ns
Waveforms (below)
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9
LYONTEK [ Lyontek Inc. ]
