®
LY6125616
5V 256K X 16 BIT HIGH SPEED CMOS SRAM
Rev. 2.1
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL
TEST CONDITION
CE# ≧ VCC - 0.2V
CC = 2.0V
CE# ≧ VCC - 0.2V
other pins at 0.2V or VCC-0.2V
MIN. TYP. MAX. UNIT
VDR
2.0
-
-
5.5
10
2
V
mA
mA
12
-
-
-
V
Data Retention Current
IDR
15/20/25
15/20/25LL
0.05
10
50
A
µ
Chip Disable to Data
Retention Time
Recovery Time
See Data Retention
Waveforms (below)
tCDR
tR
0
-
-
-
-
ns
ns
tRC
*
tRC = Read Cycle Time
*
DATA RETENTION WAVEFORM
VDR ≧ 2.0V
Vcc(min.)
Vcc
Vcc(min.)
tCDR
tR
VIH
CE# ≧ Vcc-0.2V
VIH
CE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9
LYONTEK [ Lyontek Inc. ]
