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LF3310QC15 参数 Datasheet PDF下载

LF3310QC15图片预览
型号: LF3310QC15
PDF下载: 下载PDF文件 查看货源
内容描述: 水平/垂直数字图像过滤器 [Horizontal / Vertical Digital Image Filter]
分类和应用: 过滤器外围集成电路输出元件LTE时钟
文件页数/大小: 21 页 / 289 K
品牌: LOGIC [ LOGIC DEVICES INCORPORATED ]
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LF3310
DEVICES INCORPORATED
Horizontal / Vertical Digital Image Filter
F
IGURE
2.
I
NPUT
F
ORMATS
Input Data
11 10 9
–2
11
2
10
2
9
(Sign)
SIGNAL DEFINITIONS
Power
V
CC
and GND
+3.3 V power supply. All pins must
be connected.
Clock
CLK — Master Clock
The rising edge of CLK strobes all
enabled registers.
Inputs
DIN
11-0
— Data Input
DIN
11-0
is the 12-bit registered data
input port. Data is latched on the
rising edge of CLK.
HCF
11-0
— Horizontal Coefficient Input
HCF
11-0
is used to load data into the
horizontal coefficient banks and the
Configuration/Control Registers.
Data present on HCF
11-0
is latched
into the Horizontal LF Interface
TM
on
the rising edge of CLK when HLD is
LOW (see the LF Interface
TM
section
for a full discussion).
HCA
7-0
— Horizontal Coefficient
Address
HCA
7-0
determines which row of data
in the horizontal coefficient banks is
fed to the multipliers in the horizontal
filter. HCA
7-0
is latched into the
Horizontal Coefficient Address
Register on the rising edge of CLK
when HCEN is LOW.
VCF
11-0
— Vertical Coefficient Input
VCF
11-0
is used to load data into the
vertical coefficient banks and the
Configuration/Control Registers.
Data present on VCF
11-0
is latched
into the Vertical LF Interface
TM
on the
rising edge of CLK when VLD is
LOW (see the LF Interface
TM
section
for a full discussion).
Coefficient Data
11 10 9
–2
0
2
–1
2
–2
(Sign)
2 1 0
2
2
2
1
2
0
2 1 0
2
–9
2
–10
2
–11
F
IGURE
3.
H
ORIZONTAL AND
V
ERTICAL
A
CCUMULATOR
F
ORMATS
Vertical Accumulator Output
31 30 29
–2
20
2
19
2
18
(Sign)
Horizontal Accumulator Output
31 30 29
–2
20
2
19
2
18
(Sign)
2 1 0
2
–9
2
–10
2
–11
2 1 0
2
–9
2
–10
2
–11
T
ABLE
1. O
UTPUT
F
ORMATS
SLCT
4-0
00000
00001
00010
S
11
S
10
F
11
F
10
S
9
F
9
F
12
F
11
F
10
F
13
F
12
F
11
···
···
···
···
S
6
F
6
F
7
F
8
S
5
F
5
F
6
F
7
···
···
···
···
S
2
F
2
F
3
F
4
S
1
F
1
F
2
F
3
S
0
F
0
F
1
F
2
·
·
·
10010
10011
10100
·
·
·
·
·
·
·
·
·
···
···
···
·
·
·
·
·
·
···
···
···
·
·
·
·
·
·
·
·
·
F
29
F
28
F
27
F
30
F
29
F
28
F
31
F
30
F
29
F
24
F
23
F
25
F
24
F
26
F
25
Controls
F
20
F
19
F
18
F
21
F
20
F
19
F
22
F
21
F
20
VCA
7-0
— Vertical Coefficient Address
VCA
7-0
determines which row of data
in the vertical coefficient banks is fed
to the multipliers in the vertical filter.
VCA
7-0
is latched into the Vertical
Coefficient Address Register on the
rising edge of CLK when VCEN is
LOW.
Outputs
DOUT
11-0
— Data Output
DOUT
11-0
is the 12-bit registered data
output port.
HLD — Horizontal Coefficient Load
When HLD is LOW, data on HCF
11-0
is latched into the Horizontal LF
Interface
TM
on the rising edge of CLK.
When HLD is HIGH, data can not be
latched into the Horizontal LF
Interface
TM
. When enabling the LF
Interface
TM
for data input, a HIGH to
LOW transition of HLD is required in
order for the input circuitry to func-
tion properly. Therefore, HLD must
be set HIGH immediately after power
up to ensure proper operation of the
input circuitry (see the LF Interface
TM
section for a full discussion).
Video Imaging Products
3
11/08/2001-LDS.3310-H