PreLIMINArY INforMAtIoN L9D112G80BG4
1.2 Gb, DDR - SDRAM Integrated Module (IMOD)
REGISTER DEFINITION
co m m a n D s
The TRUTH TABLE (below) provides a quick reference of available commands, followed by a written description of each command.
tr u t h ta B l e
Notes
Name (Function)
CSx\
RASx\
CASx\
WEx\
ADDR
H
X
X
X
X
1,9
Deselect (NOP)
L
L
L
L
L
L
L
L
H
L
H
H
L
H
H
H
L
X
Bank/Row
Bank/Column
Bank/Column
X
1,9
1,3
1,4
1,4
1,8
1,5
6,7
1,2
No Operation (NOP)
ACTIVE (select bank and activate row)
READ (select bank and column, and start READ burst)
WRITE (select bank and column and start WRITE burst)
BURST TERMINATE
H
H
H
L
L
H
H
L
L
L
Code
PRECHARGE (deactivate row in bank or banks)
AUTO REFRESH or SELF REFRESH (enter soft refresh mode)
LOAD MODE REGISTER
L
H
L
X
L
L
OP Code
tr u t h ta B l e - Dm oP e r a t io n
Notes
Name (Function)
DQMLx, DQMHx
DQSLx, DQSHx
L
Valid
1,10
WRITE ENABLE
H
X
1,10
WRITE INHIBIT
NOTES:
6. This command is AUTO REFRESH if CKE is HIGH; SELF REFRESH if
CKE is LOW.
1. CKE is HIGH for all commands shown except SELF REFRESH.
2. A0-A12 define the op-code to be written to the selected MODE
REGISTER BA0, BA1 select either the MODE REGISTER or the
EXTENDED MODE REGISTER.
7. Internal REFRESH counter controls row addressing; all inputs and I/Os
are “Don’t Care” except for CLE.
8. Applies only to READ bursts with AUTO PRECHARGE disabled. This
command is undefined (and should not be used) for READ burst with
AUTO PRECHARGE enabled.
3. A0-A12 provide row addresses, and BA0, BA1 provide bank addresses.
4. A0-A8 provide column address; A10 HIGH enables the AUTO
PRECHARGE feature (non-persistent), while A10 LOW disables the
AUTO PRECHARGE feature; BA0, BA1 provide bank address.
9. DESELECT and NOP are functionally interchangeable.
10. Used to mask WRITE data; provided coincident with the corresponding
data.
5. A10 LOW; BA0, BA1 determine the bank being PRECHARGED. A10
HIGH all banks PRECHARGED and BA0, BA1 or “Don’t Care”.
De s e l e c t
The DESELECT function (CSx\=HIGH) prevents new commands from being executed by the DDR IMOD. The IMOD is effectively deselected. Operations
already in progress are not affected.
LOGIC Devices Incorporated
www.logicdevices.com
High Performance, Integrated Memory Module Product
12
Feb 2, 2009 LDS-L9D112G80BG4-C
LOGIC [ LOGIC DEVICES INCORPORATED ]
