LTC3400-1
OPERATIO
above the burst threshold, the LTC3400-1 will resume
continuous PWM operation seamlessly. Referring to the
Block Diagram, an optional capacitor (C
FF
) between V
OUT
and FB in some circumstances can reduce the peak-to-
APPLICATIO S I FOR ATIO
PCB LAYOUT GUIDELINES
The high speed operation of the LTC3400-1 demands
careful attention to board layout. You will not get adver-
tised performance with careless layout. Figure 1 shows
the recommended component placement. A large ground
pin copper area will help to lower the chip temperature. A
multilayer board with a separate ground plane is ideal, but
not absolutely necessary.
(OPTIONAL)
OUTPUT CURRENT (mA)
V
IN
1
2
3
SW
V
IN
6
GND V
OUT
5
FB SHDN 4
SHDN
V
OUT
34001 F02
RECOMMENDED COMPONENT PLACEMENT. TRACES
CARRYING HIGH CURRENT ARE DIRECT. TRACE AREA AT
FB PIN IS SMALL. LEAD LENGTH TO BATTERY IS SHORT
Figure 1. Recommended Component Placement
for Single Layer Board
COMPONENT SELECTION
Inductor Selection
The LTC3400-1 can utilize small surface mount and chip
inductors due to its fast 1.2MHz switching frequency. A
minimum inductance value of 3.3µH is necessary for 3.6V
and lower voltage applications and 4.7µH for output
voltages greater than 3.6V. Larger values of inductance
6
U
W
U U
U
peak V
OUT
ripple and input quiescent current during Burst
Mode operation. Typical values for C
FF
range from 15pF to
220pF.
will allow greater output current capability by reducing the
inductor ripple current. Increasing the inductance above
10µH will increase size while providing little improvement
in output current capability.
The approximate output current capability of the LTC3400-1
versus inductance value is given in the equation below and
illustrated graphically in Figure 2.
180
160
140
120
V
OUT
= 5V
110
80
60
3
5
7
9 11 13 15 17 19 21 23
INDUCTANCE (µH)
34001 F03
V
IN
=1.2V
V
OUT
= 3V
V
OUT
= 3.3V
V
OUT
= 3.6V
Figure 2. Maximum Output Current vs
Inductance Based On 90% Efficiency
V •D
⎞
⎛
I
OUT(MAX)
=
η
•
⎜
I
P
–
IN
⎟
•
(
1 – D
)
⎝
f • L • 2
⎠
where:
η
= estimated efficiency
I
P
= peak current limit value (0.6A)
V
IN
= input (battery) voltage
D = steady-state duty ratio = (V
OUT
– V
IN
)/V
OUT
f = switching frequency (1.2MHz typical)
L = inductance value
34001f
LINER [ LINEAR TECHNOLOGY ]
