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LTC2487IDEPBF 参数 Datasheet PDF下载

LTC2487IDEPBF图片预览
型号: LTC2487IDEPBF
PDF下载: 下载PDF文件 查看货源
内容描述: 16位双/四通道ADC与PGA ,易于驱动和I2C接口 [16-Bit 2-/4-Channel ADC with PGA, Easy Drive and I2C Interface]
分类和应用: 驱动
文件页数/大小: 32 页 / 651 K
品牌: Linear [ Linear ]
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LTC2487  
analog inpuT anD reFerence The  
denotes the specifications which apply over the full operating  
temperature range, otherwise specifications are at T = 25°C. (Note 3)  
A
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
+
+
IN  
Absolute/Common Mode IN Voltage  
GND – 0.3V  
V
V
+ 0.3V  
V
CC  
+
(IN Corresponds to the Selected Positive Input Channel)  
IN  
Absolute/Common Mode IN Voltage  
GND – 0.3V  
–FS  
+ 0.3V  
+FS  
V
CC  
(IN Corresponds to the Selected Negative Input Channel)  
+
V
Input Differential Voltage Range (IN – IN )  
V
V
IN  
+
FS  
Full Scale of the Differential Input (IN – IN )  
0.5V /Gain  
REF  
16  
LSB  
Least Significant Bit of the Output Code  
FS/2  
+
+
REF  
REF  
Absolute/Common Mode REF Voltage  
0.1  
GND  
0.1  
V
V
V
CC  
+
Absolute/Common Mode REF Voltage  
REF – 0.1V  
+
V
Reference Voltage Range (REF – REF )  
V
V
REF  
CC  
+
+
CS(IN )  
IN Sampling Capacitance  
11  
11  
11  
1
pF  
pF  
pF  
nA  
nA  
nA  
nA  
ns  
dB  
CS(IN )  
IN Sampling Capacitance  
CS(V  
)
V
Sampling Capacitance  
REF  
REF  
+
+
+
I
I
I
I
t
IN DC Leakage Current  
Sleep Mode, IN = GND  
–10  
–10  
10  
DC_LEAK(IN )  
IN DC Leakage Current  
Sleep Mode, IN = GND  
1
10  
DC_LEAK(IN )  
+
+
+
REF DC Leakage Current  
Sleep Mode, REF = V  
–100  
–100  
1
100  
100  
DC_LEAK(REF )  
CC  
REF DC Leakage Current  
Sleep Mode, REF = GND  
1
DC_LEAK(REF )  
MUX Break-Before-Make  
MUX Off Isolation  
50  
120  
OPEN  
QIRR  
V = 2V DC to 1.8MHz  
IN P-P  
i2c inpuTs anD DigiTal ouTpuTs  
The  
denotes the specifications which apply over the full  
operating temperature range, otherwise specifications are at T = 25°C. (Note 3)  
A
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
0.7V  
TYP  
MAX  
UNITS  
V
V
V
V
High Level Input Voltage  
V
V
IH  
CC  
Low Level Input Voltage  
0.3V  
IL  
CC  
Low Level Input Voltage for Address Pins CA0, CA1  
High Level Input Voltage for Address Pins CA0, CA1  
0.05V  
V
IHA  
ILA  
CC  
0.95V  
V
CC  
R
INH  
R
INL  
R
INF  
Resistance from CA0, CA1 to V to Set Chip Address  
Bit to 1  
10  
10  
kW  
CC  
Resistance from CA0, CA1 to GND to Set Chip Address  
Bit to 0  
kW  
Resistance from CA0, CA1 to GND or V to Set Chip  
Address Bit to Float  
2
MW  
CC  
I
Digital Input Current  
–10  
10  
µA  
V
I
V
V
Hysteresis of Schmitt Trigger Inputs  
Low Level Output Voltage (SDA)  
(Note 5)  
I = 3mA  
0.05V  
HYS  
OL  
CC  
0.4  
V
t
OF  
Output Fall Time V  
to V  
Bus Load C 10pF to  
400pF (Note 14)  
20 + 0.1C  
B
250  
ns  
IH(MIN)  
IL(MAX)  
B
I
Input Leakage  
0.1V ≤ V ≤ V  
CC  
1
µA  
pF  
IN  
CC  
IN  
C
External Capacitative Load on Chip Address Pins (CA0, CA1)  
for Valid Float  
10  
CAX  
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