LTC1450/LTC1450L
U
TYPICAL APPLICATIONS N
5V
10k
V
REF
3
2
7
5V
+
6
LT®1097
0.1µF
V
OUT
10k
–2.048V TO 2.047V
(1mV/LSB)
–
4
D
IN
FROM µP
DATA (0:11)
CSLSB
CSMSB
WR
V
CC
REFOUT REFLO*
–5V
DATA BUS
2.047V
10k
10k
V
DAC
FROM µP AND
DECODE LOGIC
LTC1450
V
OUT
V
OUT
D
IN
2048 4095
–2.048V
D
– 4096
4096
X1/X2
IN
LDAC
V
= 2.048 +
4.096
OUT
(
)
FROM
SYSTEM RESET
CLR
GND
REFHI*
*REFLO IS TIED TO REFOUT AND
REFHI IS TIED TO GND
TYING REFLO TO REFOUT AND REFHI TO GND IN THIS
APPLICATION OVERCOMES THE NEED FOR A PULL-DOWN
RESISTOR ON THE REFOUT PIN. REFOUT SEES A CONSTANT
LOAD TO GND INDEPENDENT OF V
LTC1450/50L • TA05
OUT
V
REF
R2
22.6k
R1
20k
R6
20k
15V
V
CC
2
3
2.047mA
7
0.1µF
–
+
6
I
D
IN
LT1097
OUT
2048 4095
D
IN
FROM µP
DATA BUS
DATA (0:11)
CSLSB
CSMSB
WR
V
REFOUT REFHI
–2.048mA
CC
4
R5
1.13k
–15V
R3
20k
R4
21.5k
I
V
DAC
OUT
FROM µP AND
DECODE LOGIC
LTC1450
V
OUT
–2.048mA TO 2.047mA
(1µA/LSB)
D
4096
X1/X2
REFLO
R2
(R1)(R5)
IN
LDAC
I
=
• 4.096 – V
OUT
REF
(
)
FROM
SYSTEM RESET
CLR
GND
R1 = R3
R2 = R4 + R5
(R1)(R5)(R3 + R4)
(R2)(R3) – R1(R4 + R5)
Z
=
OUT
LTC1450/50L • TA06
12
Linear [ Linear ]
