LTC1435
U
W U U
APPLICATIONS INFORMATION
Design Example
highest at the maximum input voltage. The output voltage
ripple due to ESR is approximately:
As a design example, assume VIN = 12V(nominal), VIN =
22V(max), VOUT = 3.3V, IMAX = 3A and f = 250kHz, RSENSE
and COSC can immediately be calculated:
V
ORIPPLE = RESR(∆IL) = 0.03Ω(1.112A) = 34mVP-P
PC Board Layout Checklist
RSENSE = 100mV/3A = 0.033Ω
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC1435. These items are also illustrated graphically in
the layout diagram of Figure 8. Check the following in your
layout:
COSC = 1.37(104)/250 – 11 = 43pF
Referring to Figure 3, a 10µH inductor falls within the
recommended range. To check the actual value of the
ripple current the following equation is used:
1. Are the signal and power grounds segregated? The
LTC1435 signal ground pin must return to the (–) plate
of COUT. The power ground connects to the source of
the bottom N-channel MOSFET, anode of the Schottky
diode, and (–) plate of CIN, which should have as short
lead lengths as possible.
V
f L
( )( )
V
OUT
OUT
∆I =
1–
L
V
IN
The highest value of the ripple current occurs at the
maximum input voltage:
3.3V
3.3V
22V
∆I =
1–
= 1.12A
L
2. Does the VOSENSE pin connect directly to the feedback
resistors? The resistive divider R1, R2 must be con-
nectedbetweenthe(+)plateofCOUT andsignalground.
The 100pF capacitor should be as close as possible to
the LTC1435.
3. AretheSENSE– andSENSE+ leadsroutedtogetherwith
minimum PC trace spacing? The filter capacitor be-
tween SENSE+ and SENSE– should be as close as
possible to the LTC1435.
250kHz 10µH
(
)
The power dissipation on the topside MOSFET can be
easily estimated. Choosing a Siliconix Si4412DY results
in: RDS(ON) = 0.042Ω, CRSS = 100pF. At maximum input
voltage with T(estimated) = 50°C:
2
( )
3.3V
22V
P
=
3 1+ 0.005 50°C − 25°C 0.042Ω
(
)(
) (
]
)
)
MAIN
[
1.85
+ 2.5 22V
3A 100pF 250kHz = 122mW
(
)
(
)(
)(
4. Does the (+) plate of CIN connect to the drain of the
topsideMOSFET(s)ascloselyaspossible?Thiscapaci-
tor provides the AC current to the MOSFET(s).
The most stringent requirement for the synchronous
N-channel MOSFET occurs when VOUT = 0 (i.e. short
circuit). In this case the worst-case dissipation rises to:
5. Is the INTVCC decoupling capacitor connected closely
between INTVCC and the power ground pin? This ca-
pacitor carries the MOSFET driver peak currents.
2
P
= I
1+δ R
(
DS ON
)
SYNC
(
SC AVG
)
(
)
(
)
6. KeeptheswitchingnodeSWawayfromsensitivesmall-
signal nodes. Ideally the switch node should be placed
at the furthest point from the LTC1435.
With the 0.033Ω sense resistor ISC(AVG) = 4A will result,
increasing the Si4412DY dissipation to 950mW at a die
temperature of 105°C.
7. SGND should be exclusively used for grounding exter-
nal components on COSC, ITH, VOSENSE and SFB pins.
CIN is chosen for an RMS current rating of at least 1.5A at
temperature. COUT is chosen with an ESR of 0.03Ω for low
outputripple. Theoutputrippleincontinuousmodewillbe
15