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LT1763CS8-2.5-TRPBF 参数 Datasheet PDF下载

LT1763CS8-2.5-TRPBF图片预览
型号: LT1763CS8-2.5-TRPBF
PDF下载: 下载PDF文件 查看货源
内容描述: 500毫安,低噪声, LDO稳压器微 [500mA, Low Noise, LDO Micropower Regulators]
分类和应用: 稳压器
文件页数/大小: 22 页 / 1120 K
品牌: Linear [ Linear ]
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LT1763 Series  
PIN FUNCTIONS (DE12/S8)  
NC (Pins 1, 4, 9, 12) DE12 Only: No Connect. No connect  
BYP (Pin 6/Pin 4): Bypass. The BYP pin is used to bypass  
thereferenceoftheLT1763regulatorstoachievelownoise  
performance from the regulator. The BYP pin is clamped  
pins have no connection to any internal circuitry. These  
pins may be tied to either GND or V , or left floating.  
IN  
internally to 0.6V (one V ). A small capacitor from the  
BE  
OUT (Pins 2, 3/Pin 1): Output. The output supplies power  
to the load. A minimum output capacitor of 3.3μF is re-  
quired to prevent oscillations. Larger output capacitors  
will be required for applications with large transient loads  
tolimitpeakvoltagetransients. SeetheApplicationsInfor-  
mationsectionformoreinformationonoutputcapacitance  
and reverse output characteristics.  
output to this pin will bypass the reference to lower the  
output voltage noise. A maximum value of 0.01μF can  
be used for reducing output voltage noise to a typical  
20μV  
over a 10Hz to 100kHz bandwidth. If not used,  
RMS  
this pin must be left unconnected.  
GND (Pins 7, Exposed Pad Pin 13/Pins 3, 6, 7): Ground.  
The exposed pad of the DFN package is an electrical con-  
nection to GND. To ensure proper electrical and thermal  
performance, solder Pin 13 to the PCB ground and tie  
directly to Pin 7. Connect the bottom of the output volt-  
age setting resistor divider directly to the GND pins for  
optimum load regulation performance.  
ADJ (Pin 5/Pin 2): Adjust. For the adjustable LT1763, this  
is the input to the error amplifier. This pin is internally  
clamped to 7V. It has a bias current of 30nA which flows  
into the pin (see the curve of ADJ Pin Bias Current vs  
Temperature in the Typical Performance Characteristics  
section).TheADJpinvoltageis1.22Vreferencedtoground  
and the output voltage range is 1.22V to 20V.  
SHDN (Pin 8/Pin 5): Shutdown. The SHDN pin is used  
to put the LT1763 regulators into a low power shutdown  
state. The output will be off when the SHDN pin is pulled  
low. The SHDN pin can be driven either by 5V logic or  
open-collector logic with a pull-up resistor. The pull-up  
resistor is required to supply the pull-up current of the  
open-collector gate, normally several microamperes, and  
the SHDN pin current, typically 1μA. If unused, the SHDN  
SENSE (Pin 5/Pin 2): Output Sense. For fixed volt-  
age versions of the LT1763 (LT1763-1.5/LT1763-1.8/  
LT1763-2.5/LT1763-3/LT1763-3.3/LT1763-5), the SENSE  
pin is the input to the error amplifier. Optimum regula-  
tion will be obtained at the point where the SENSE pin  
is connected to the OUT pin of the regulator. In critical  
applications, small voltage drops are caused by the re-  
pin must be connected to V . The device will be in the low  
IN  
sistance (R ) of PC traces between the regulator and the  
P
power shutdown state if the SHDN pin is not connected.  
load. These may be eliminated by connecting the SENSE  
pin to the output at the load as shown in Figure 1 (Kelvin  
Sense Connection).  
IN(Pin10,11/Pin8):Input.Powerissuppliedtothedevice  
through the IN pin. A bypass capacitor is required on this  
pin if the device is more than six inches away from the  
main input filter capacitor. In general, the output imped-  
ance of a battery rises with frequency, so it is advisable to  
include a bypass capacitor in battery-powered circuits. A  
bypass capacitor in the range of 1μF to 10μF is sufficient.  
The LT1763 regulators are designed to withstand reverse  
voltages on the IN pin with respect to ground and the OUT  
pin. In the case of a reverse input, which can happen if  
a battery is plugged in backwards, the device will act as  
if there is a diode in series with its input. There will be  
no reverse current flow into the regulator and no reverse  
voltage will appear at the load. The device will protect both  
itself and the load.  
R
P
8
1
IN  
OUT  
LT1763  
+
5
2
+
SHDN SENSE  
LOAD  
V
IN  
GND  
3
R
P
1763 F01  
Figure 1. Kelvin Sense Connection  
Note that the voltage drop across the external PC traces will  
add to the dropout voltage of the regulator. The SENSE pin  
biascurrentis1Aatthenominalratedoutputvoltage.The  
SENSE pin can be pulled below ground (as in a dual supply  
system where the regulator load is returned to a negative  
supply) and still allow the device to start and operate.  
1763fg  
14  
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