LT1507
U
W U U
APPLICATIONS INFORMATION
The anode of the diode can be connected to the regulated
output voltage or the unregulated input voltage. The
“boost voltage” generated across the boost capacitor is
then nearly identical to the anode voltage. The input
connection minimizes start-up problems and gives plenty
of boost voltage, but efficiency is slightly lower, especially
with input voltages above 10V. For 5V to 3.3V operation,
or any output voltage less than 3.3V, the diode should be
connected to the input. With input voltage more than 3V
above the output and an output voltage of at least 3.3V the
output connection will give better efficiency. Use the
BAT85 Schottky diode for 3.3V applications where the
anode is connected to the output.
This is safe for short periods of time, but it would be
prudent to check with the diode manufacturer if continu-
ous operation under these conditions must be tolerated.
BOOST PIN CONSIDERATIONS
Formostapplications, theboostcomponentsarea0.22µF
capacitorandanMBR0520orBAT85Schottkydiode. This
capacitor value is twice that suggested for the LT1376
because the lower voltages commonly found in LT1507
applications may require lower ripple voltage across the
capacitor to ensure adequate boost voltage under worst-
case conditions. Efficiency is not affected by the capacitor
value, but the capacitor should have an ESR of less than
2Ωtoensurethatitcanberechargedfullyundertheworst-
casecondition of minimuminputvoltage. Almost any type
of film or ceramic capacitor will work fine.
LAYOUT CONSIDERATIONS
Suggested layout for the LT1507 is shown in Figure 3. The
main concern for layout is to minimize the length of the
INPUT
C
C
F
MINIMIZE AREA OF
D2
C2
CONNECTIONS TO THE
SWITCH NODE AND
BOOST NODE, BUT OBSERVE
CURRENT DENSITY LIMITATIONS
C
C
AND R ARE OPTIONAL.
C
F
V
BOOST
IN
C
SEE FREQUENCY
COMPENSATION
IN PATH TO L1
C3
D1
R
C
FB
GND
KEEP INPUT CAPACITOR
AND CATCH DIODE CLOSE
TO REGULATOR AND
TERMINATE THEM
SW
R2
SHDN
SYNC
TO SAME POINT
R1
L1
SYNC
C1
OUTPUT
TERMINATE GND PIN
DIRECTLY TO GROUND
PLANE WITH VIA TO
MINIMIZE EMI. (MINIMIZE
DISTANCE TO INPUT
CAPACITOR C3). CONNECT
FEEDBACK RESISTORS AND
COMPENSATION
GROUND RING NEED
NOT BE AS SHOWN.
(NORMALLY EXISTS AS
INTERNAL PLANE)
COMPONENTS DIRECTLY
TO GROUND PLANE OR TO
SWITCHER GND PIN.
CONNECT OUTPUT CAPACITOR
DIRECTLY TO HEAVY GROUND
TAKE OUTPUT DIRECTLY FROM END OF OUTPUT
CAPACITOR TO AVOID PARASITIC RESISTANCE
AND INDUCTANCE (KELVIN CONNECTION)
LT1507 • F03
Figure 3. Suggested Layout
13
Linear [ Linear ]
