LT1375/ LT1376
U
W
U U
APPLICATIONS INFORMATION
D2
1N914
C2
0.1µF
BOOST
LT1376-5
OUTPUT
5V
INPUT
6V TO 25V
V
V
IN
SW
L1*
10µH
BIAS
SHDN
GND
SENSE
C
V
+
+
C1**
100µF
10V TANT
+
C3
22µF
R
C
35V TANT
470Ω
D1
1N5818
C
C
0.01µF
GND
+
C4**
100µF
10V TANT
C5**
100µF
10V TANT
* L1 IS A SINGLE CORE WITH TWO WINDINGS
COILTRONICS #CTX10-2P
L1*
D3
1N5818
** AVX TPSD107M010
OUTPUT
†
IF LOAD CAN GO TO ZERO, AN OPTIONAL
†
–5V
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
1375/76 F20
Figure 20. Dual Output SEPIC Converter
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
0.130 ± 0.005
0.300 – 0.325
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.255)
8
7
6
5
0.065
(1.651)
TYP
0.255 ± 0.015*
(6.477 ± 0.381)
0.009 – 0.015
0.125
(0.229 – 0.381)
0.020
(3.175)
MIN
+0.035
–0.015
(0.508)
MIN
1
2
4
3
0.325
N8 1197
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
+0.889
–0.381
8.255
(
)
(0.457 ± 0.076)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofits circuits as describedhereinwillnotinfringeonexistingpatentrights.
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