LT1373
W U U
APPLICATIO S I FOR ATIO
U
A logic low on the S/S pin activates shutdown, reducing
the part’s supply current to 12µA. Typical synchronization
range is from 1.05 and 1.8 times the part’s natural switch-
ingfrequency,butisonlyguaranteedbetween300kHzand
340kHz. A 12µs resetable shutdown delay network guar-
antees the part will not go into shutdown while receiving
a synchronization signal.
Negative Output Voltage Setting
The LT1373 develops a –2.45V reference (VNFR) from the
NFB pin to ground. Output voltage is set by connecting the
NFB pin to an output resistor divider (Figure 2). The –7µA
NFBpinbiascurrent(INFB)cancauseoutputvoltageerrors
and should not be ignored. This has been accounted for in
the formula in Figure 2. The suggested value for R2 is
2.49k. The FB pin is normally left open for negative output
applications. SeeDualPolarityOutputVoltageSensingfor
limitations of FB pin loading when using the NFB pin.
Caution should be used when synchronizing above
330kHz because at higher sync frequencies the ampli-
tude of the internal slope compensation used to prevent
subharmonic switching is reduced. This type of
subharmonic switching only occurs when the duty cycle
of the switch is above 50%. Higher inductor values will
tend to eliminate problems.
–V
OUT
R1
R1
R2
–V
= V
V
1 +
+ I (R1)
NFB
OUT
NFB
(
)
I
NFB
NFB
PIN
– 2.45
OUT
R1 =
2.45
R2
–6
R2
+ (7 • 10
)
(
)
V
Thermal Considerations
NFR
LT1373 • F02
Care should be taken to ensure that the worst-case input
voltage and load current conditions do not cause exces-
sive die temperatures. The packages are rated at 120°C/W
for SO (S8) and 130°C/W for PDIP (N8).
Figure 2. Negative Output Resistor Divider
Dual Polarity Output Voltage Sensing
Certain applications benefit from sensing both positive
and negative output voltages. One example is the Dual
Output Flyback Converter with Overvoltage Protection
circuit shown in the Typical Applications section. Each
output voltage resistor divider is individually set as de-
scribed above. When both the FB and NFB pins are used,
the LT1373 acts to prevent either output from going
beyond its set output voltage. For example in this applica-
tion, if the positive output were more heavily loaded than
the negative, the negative output would be greater and
would regulate at the desired set-point voltage. The posi-
tive output would sag slightly below its set-point voltage.
This technique prevents either output from going unregu-
lated high at no load. Please note that the load on the FB
pin should not exceed 100µA when the NFB pin is used.
This situation occurs when the resistor dividers are used
at both FB and NFB. True load on FB is not the full divider
current unless the positive output is shorted to ground.
See Dual Output Flyback Converter application.
Average supply current (including driver current) is:
IIN = 1mA + DC (ISW/60 + ISW • 0.004)
ISW = switch current
DC = switch duty cycle
Switch power dissipation is given by:
PSW = (ISW)2 • RSW • DC
RSW = output switch “On” resistance
Total power dissipation of the die is the sum of supply
current times supply voltage plus switch power:
P
D(TOTAL) = (IIN • VIN) + PSW
Choosing the Inductor
For most applications the inductor will fall in the range of
10µHto50µH.Lowervaluesarechosentoreducephysical
size of the inductor. Higher values allow more output
current because they reduce peak current seen by the
power switch which has a 1.5A limit. Higher values also
reduce input ripple voltage, and reduce core loss.
Shutdown and Synchronization
The dual function S/S pin provides easy shutdown and
synchronization. It is logic level compatible and can be
pulledhigh, tiedtoVIN orleftfloatingfornormaloperation.
When choosing an inductor you might have to consider
maximum load current, core and copper losses, allowable
7
Linear [ Linear ]
