LT1372/LT1377
PI FU CTIO S
V
C
(Pin 1):
The compensation pin is used for frequency
compensation, current limiting and soft start. It is the
output of the error amplifier and the input of the current
comparator. Loop frequency compensation can be per-
formed with an RC network connected from the V
C
pin to
ground.
FB (Pin 2):
The feedback pin is used for positive output
voltage sensing and oscillator frequency shifting. It is the
inverting input to the error amplifier. The noninverting
input of this amplifier is internally tied to a 1.245V
reference. Load on the FB pin should not exceed 250µA
when the NFB pin is used. See Applications Information.
NFB (Pin 3):
The negative feedback pin is used for negative
output voltage sensing. It is connected to the inverting
input of the negative feedback amplifier through a 100k
source resistor.
S/S (Pin 4):
Shutdown and Synchronization Pin. The S/S
pin is logic level compatible. Shutdown is active low and
the shutdown threshold is typically 1.3V. For normal
operation, pull the S/S pin high, tie it to V
IN
or leave it
floating. To synchronize switching, drive the S/S pin be-
tween 600kHz and 800kHz (LT1372) or 1.2MHz to 1.6MHz
(LT1377).
V
IN
(Pin 5):
Bypass input supply pin with 10µF or more. The
part goes into undervoltage lockout when V
IN
drops below
2.5V. Undervoltage lockout stops switching and pulls the
V
C
pin low.
GND S (Pin 6):
The ground sense pin is a “clean” ground.
The internal reference, error amplifier and negative feed-
back amplifier are referred to the ground sense pin. Con-
nect it to ground. Keep the ground path connection to the
output resistor divider and the V
C
compensation network
free of large ground currents.
GND (Pin 7):
The ground pin is the emitter connection of
the power switch and has large currents flowing through it.
It should be connected directly to a good quality ground
plane.
V
SW
(Pin 8):
The switch pin is the collector of the power
switch and has large currents flowing through it. Keep the
traces to the switching components as short as possible to
minimize radiation and voltage spikes.
BLOCK DIAGRA
S/S
100k
NFB
50k
FB
1.245V
REF
GND SENSE
+
–
W
U
U
U
V
IN
SHUTDOWN
DELAY AND RESET
LOW DROPOUT
2.3V REG
SW
ANTI-SAT
SYNC
OSC
LOGIC
DRIVER
SWITCH
5:1 FREQUENCY
SHIFT
+
NFBA
–
COMP
+
EA
V
C
A
V
≈
6
IA
0.08Ω
–
GND
LT1372 • BD
5
LINER [ LINEAR TECHNOLOGY ]
