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LT1366CS8#TR 参数 Datasheet PDF下载

LT1366CS8#TR图片预览
型号: LT1366CS8#TR
PDF下载: 下载PDF文件 查看货源
内容描述: [LT1366 - Dual Precision Rail-to-Rail Input and Output Op Amps; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C]
分类和应用: 运算放大器放大器电路光电二极管
文件页数/大小: 20 页 / 414 K
品牌: Linear [ Linear ]
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LT1366/LT1367  
LT1368/LT1369  
U
W U U  
APPLICATIONS INFORMATION  
cated on Linear Technology’s proprietary complementary  
bipolar process, which ensures very similar DC and AC  
characteristics for the output devices Q24 and Q26.  
When overdriven, the amplifier draws input current that  
exceeds the normal input bias current. Figures 2 and 3  
show some typical overdrive currents as a function of  
input voltage. The input current must be less than 1mA of  
positive overdrive or less than 7mA of negative overdrive,  
for the phase reversal protection to work properly. When  
the amplifier is severely overdriven, an external resistor  
should be used to limit the overdrive current. In addition  
to overdrive protection, the amplifier is protected against  
ESD strokes up to 4kV on all pins.  
A simple comparator Q5 steers current from current  
source I1 between the two input stages. When the input  
common mode voltage VCM is near the negative supply,  
Q5 is reverse biased, and I1 becomes the tail current for  
the PNP differential pair Q1/Q2. At the other extreme,  
when VCM is within about 1.3V from the positive supply,  
Q5 diverts I1 to the current mirror D3/Q6, which furnishes  
the tail current for the NPN differential pair Q3/Q4.  
110  
MEASURED AS A  
FOLLOWER  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
The collector currents of the two input pairs are combined  
in the second stage, consisting of Q7 through Q11. Most  
of the voltage gain in the amplifier is contained in this  
stage. Differential amplifier Q14/Q15 buffers the output of  
the second stage, converting the output voltage to differ-  
ential currents. The differential currents pass through  
current mirrors D4/Q17 and D5/Q16, and are converted to  
differential voltages by Q18 and Q19. These voltages are  
also buffered and applied to the output Darlington pairs  
Q23/Q24 and Q25/Q26. Capacitors C1 and C2 form local  
feedback loops around the output devices, lowering the  
output impedance at high frequencies.  
+
T = 25°C  
T = 85°C  
T = 70°C  
T = –55°C  
–500  
–300  
–100 V 100  
300  
500  
S
COMMON MODE VOLTAGE RELATIVE TO  
POSITIVE SUPPLY (mV)  
LT1366 F02  
Input Offset Voltage  
Figure 2. Input Bias Current vs Common Mode Voltage  
Since the amplifier has two input stages, the input offset  
voltage changes depending upon which stage is active.  
The input offsets are random, but bounded voltages.  
When the amplifier switches between stages, offset volt-  
ages may go up, down, or remain flat; but will not exceed  
the guaranteed limits. This behavior is illustrated in three  
distribution plots of input offset voltage in the Typical  
Performance Characteristics section.  
0
MEASURED AS A FOLLOWER  
–10  
+
20  
30  
40  
T = 55°C T = 25°C  
T = 70°C  
50  
60  
T = 85°C  
70  
80  
90  
–100  
–110  
Overdrive Protection  
Two circuits prevent the output from reversing polarity  
when the input voltage exceeds the common mode range.  
When the noninverting input exceeds the positive supply  
by approximately 300mV, the clamp transistor Q12 (Fig-  
ure 1) turns on, pulling the output of the second stage low,  
which forces the output high. For inputs below the nega-  
tive supply, diodes D1 and D2 turn on, overcoming the  
saturation of the input pair Q1/Q2.  
800  
600  
400  
–200  
V
S
200  
COMMON MODE VOLTAGE RELATIVE TO  
NEGATIVE SUPPLY (mV)  
LT1366 F03  
Figure 3. Input Bias Current vs Common Mode Voltage  
12