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LT1361CS8#TRPBF 参数 Datasheet PDF下载

LT1361CS8#TRPBF图片预览
型号: LT1361CS8#TRPBF
PDF下载: 下载PDF文件 查看货源
内容描述: [LT1361 - Dual and Quad 50MHz, 800V/µs Op Amps; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C]
分类和应用: 运算放大器
文件页数/大小: 12 页 / 224 K
品牌: Linear [ Linear ]
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LT1361/LT1362  
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APPLICATIONS INFORMATION  
tion with large, sustained differential inputs. Under  
normal, closed-loop operation, an increase of power dis-  
sipationisonlynoticeableinapplicationswithlargeslewing  
outputs and is proportional to the magnitude of the  
differential input voltage and the percent of the time that  
the inputs are apart. Measure the average supply current  
for the application in order to calculate the power dissipa-  
tion.  
whereas the same output step in unity gain has a 10 times  
greater input step. The curve of Slew Rate vs Input Level  
illustratesthisrelationship.TheLT1361/LT1362aretested  
for slew rate in a gain of –2 so higher slew rates can be  
expected in gains of 1 and –1, and lower slew rates in  
higher gain configurations.  
The RC network across the output stage is bootstrapped  
when the amplifier is driving a light or moderate load and  
has no effect under normal operation. When driving a  
capacitive load (or a low value resistive load) the network  
is incompletely bootstrapped and adds to the compensa-  
tion at the high impedance node. The added capacitance  
slows down the amplifier which improves the phase  
margin by moving the unity-gain frequency away from the  
pole formed by the output impedance and the capacitive  
load. The zero created by the RC combination adds phase  
to ensure that even for very large load capacitances, the  
total phase lag can never exceed 180 degrees (zero phase  
margin) and the amplifier remains stable.  
Capacitive Loading  
The LT1361/LT1362 are stable with any capacitive load.  
This is accomplished by sensing the load induced output  
pole and adding compensation at the amplifier gain node.  
As the capacitive load increases, both the bandwidth and  
phase margin decrease so there will be peaking in the  
frequency domain and in the transient response as shown  
in the typical performance curves. The photo of the small  
signal response with 500pF load shows 60% peaking. The  
large signal response shows the output slew rate being  
limited to 5V/µs by the short-circuit current. Coaxial cable  
can be driven directly, but for best pulse fidelity a resistor  
of value equal to the characteristic impedance of the cable  
(i.e., 75) should be placed in series with the output. The  
other end of the cable should be terminated with the same  
value resistor to ground.  
Power Dissipation  
TheLT1361/LT1362combinehighspeedandlargeoutput  
drive in small packages. Because of the wide supply  
voltage range, it is possible to exceed the maximum  
junction temperature under certain conditions. Maximum  
junction temperature (TJ) is calculated from the ambient  
temperature (TA) and power dissipation (PD) as follows:  
Circuit Operation  
The LT1361/LT1362 circuit topology is a true voltage  
feedback amplifier that has the slewing behavior of a  
currentfeedbackamplifier.Theoperationofthecircuitcan  
be understood by referring to the simplified schematic.  
The inputs are buffered by complementary NPN and PNP  
emitter followers which drive a 500resistor. The input  
voltage appears across the resistor generating currents  
whicharemirroredintothehighimpedancenode.Comple-  
mentary followers form an output stage which buffers the  
gain node from the load. The bandwidth is set by the input  
resistor and the capacitance on the high impedance node.  
The slew rate is determined by the current available to  
charge the gain node capacitance. This current is the  
differential input voltage divided by R1, so the slew rate is  
proportional to the input. Highest slew rates are therefore  
seen in the lowest gain configurations. For example, a 10V  
output step in a gain of 10 has only a 1V input step,  
LT1361CN8: TJ = TA + (PD x 130°C/W)  
LT1361CS8: TJ = TA + (PD x 190°C/W)  
LT1362CN: TJ = TA + (PD x 110°C/W)  
LT1362CS: TJ = TA + (PD x 150°C/W)  
Worst case power dissipation occurs at the maximum  
supply current and when the output voltage is at 1/2 of  
either supply voltage (or the maximum swing if less than  
1/2 supply voltage). For each amplifier PDMAX is:  
PDMAX = (V+ – V)(ISMAX) + (V+/2)2/RL  
Example: LT1362 in S16 at 70°C, VS = ±5V, RL = 100Ω  
PDMAX = (10V)(5.6mA) + (2.5V)2/100= 119mW  
TJMAX = 70°C + (4 x 119mW)(150°C/W) = 141°C  
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