LT1175
The
●
denotes specifications which apply over the operating temperature
range, otherwise specifications are at T
A
= 25°C. V
OUT
= 5V, V
IN
= 7V, I
OUT
= 0, V
SHDN
= 3V, I
LIM2
and I
LIM4
tied to V
IN
, T
J
= 25°C,
unless otherwise noted. To avoid confusion with “min” and “max” as applied to negative voltages, all voltages are shown as
absolute values except where polarity is not obvious.
PARAMETER
GND Pin Current Increase with Load (Note 4)
Input Supply Current in Shutdown
Shutdown Thresholds (Note 9)
SHDN Pin Current (Note 2)
Output Bleed Current in Shutdown (Note 6)
SENSE Pin Input Current
Dropout Voltage (Note 7)
CONDITIONS
●
ELECTRICAL CHARACTERISTICS
MIN
TYP
10
10
MAX
20
20
25
2.5
8
4
1
5
150
20
0.2
0.26
0.7
0.5
0.45
0.45
1300
975
650
325
0.015
0.35
0.1
0.2
1.25
UNITS
µA/mA
µA
µA
V
µA
µA
µA
µA
nA
µA
V
V
V
V
V
V
mA
mA
mA
mA
%/V
%
%/W
%/W
%
V
SHDN
= 0V
●
Either Polarity On SHDN Pin
V
SHDN
= 0V to 10V (Flows Into Pin)
V
SHDN
= – 15V to 0V (Flows Into Pin)
V
OUT
= 0V, V
IN
= 15V
(Adjustable Part Only, Current Flows Out of Pin)
(Fixed Voltage Only, Current Flows Out of Pin)
I
OUT
= 25mA
I
OUT
= 100mA
I
OUT
= 500mA
I
LIM2
Open, I
OUT
= 300mA
I
LIM4
Open, I
OUT
= 200mA
I
LIM2
, I
LIM4
Open, I
OUT
= 100mA
V
IN
– V
OUT
= 1V to 12V
I
LIM2
Open
I
LIM4
Open
I
LIM2
, I
LIM4
Open
V
IN
– V
OUT
= 1V to V
IN
= 20V
I
OUT
= 0mA to 500mA
P = 0 to P
MAX
(Notes 3, 8)
5-Pin Packages
8-Pin Packages
T
J
= 25°C to T
JMIN
, or 25°C to T
JMAX
●
●
0.8
4
1
0.1
1
75
12
0.1
0.18
0.5
0.33
0.3
0.26
800
600
400
200
0.003
0.1
0.04
0.1
0.25
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
Current Limit (Note 11)
520
390
260
130
Line Regulation (Note 10)
Load Regulation (Note 5, 10)
Thermal Regulation
Output Voltage Temperature Drift
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
SHDN pin maximum positive voltage is 30V with respect to
– V
IN
and 13.5V with respect to GND. Maximum negative voltage is – 20V
with respect to GND and – 5V with respect to – V
IN
.
Note 3:
P
MAX
= 1.5W for 8-pin packages, and 6W for 5-pin packages. This
power level holds only for input-to-output voltages up to 12V, beyond
which internal power limiting may reduce power. See Guaranteed Current
Limit curve in Typical Performance Characteristics section. Note that all
conditions must be met.
Note 4:
GND pin current increases because of power transistor base drive.
At low input-to-output voltages (< 1V) where the power transistor is in
saturation, GND pin current will be slightly higher. See Typical
Performance Characteristics.
Note 5:
With I
LOAD
= 0, at T
J
> 125°C, power transistor leakage could
increase higher than the 10µA to 25µA drawn by the output divider or fixed
voltage SENSE pin, causing the output to rise above the regulated value.
To prevent this condition, an internal active pull-up will automatically turn
on, but supply current will increase.
Note 6:
This is the current required to pull the output voltage to within 1V
of ground during shutdown.
Note 7:
Dropout voltage is measured by setting the input voltage equal to
the normal regulated output voltage and measuring the difference between
V
IN
and V
OUT
. For currents between 100mA and 500mA, with both I
LIM
pins tied to V
IN
, maximum dropout can be calculated from
V
DO
= 0.15 + 1.1Ω (I
OUT
).
Note 8:
Thermal regulation is a change in the output voltage caused by die
temperature gradients, so it is proportional to chip power dissipation.
Temperature gradients reach final value in less than 100ms. Output
voltage changes after 100ms are due to absolute die temperature changes
and reference voltage temperature coefficient.
Note 9:
The lower limit of 0.8V is guaranteed to keep the regulator in
shutdown. The upper limit of 2.5V is guaranteed to keep the regulator
active. Either polarity may be used, referenced to GND pin.
Note 10:
Load and line regulation are measured on a pulse basis with
pulse width of 20ms or less to keep chip temperature constant. DC
regulation will be affected by thermal regulation (Note 8) and chip
temperature changes. Load regulation specification also holds for currents
up to the specified current limit when I
LIM2
or I
LIM4
are left open.
Note 11:
Current limit is reduced for input-to-output voltage above 12V.
See the graph in Typical Performance Characteristics for guaranteed limits
above 12V.
Note 12:
Operating at very large input-to-output differential voltages
(>15V) with load currents less than 5mA requires an output capacitor with
an ESR greater than 1Ω to prevent low level output oscillations.
1175fd
3
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