LT1175
APPLICATIONS INFORMATION
T
A
= Maximum ambient temperature
T
MAX
= Maximum LT1175 die temperature (125°C for
commercial and industrial grades)
θ
JA
V
IN
= LT1175 thermal resistance, junction to ambient
= Maximum continuous input voltage at maximum
load current
I
LOAD
= Maximum load current
Example: LT1175S8 with I
LOAD
= 200mA, V
OUT
= 5V,
V
IN
= 7V, T
A
= 60°C. Maximum die temperature for the
LT1175S8 is 125°C. Thermal resistance from Table 2 is
found to be 80°C/W.
Die Temperature = 60 + 80 (0.2A)(8 – 5) = 108°C
125 – 60
=
0
.
81W
80
Maximum Continuous
125 – 60
=
+
5
=
9V
Input Voltage
80 0
.
2
(for Thermal Considerations)
Maximum Power Dissipation =
( )
Output Voltage Reversal
The LT1175 is designed to tolerate an output voltage
reversal of up to 2V. Reversal might occur, for instance, if
the output was shorted to a positive 5V supply. This would
almost surely destroy IC devices connected to the negative
output. Reversal could also occur during start-up if the
positive supply came up first and loads were connected
between the positive and negative supplies.
For these
reasons, it is always good design practice to add a reverse
biased diode from each regulator output to ground to limit
output voltage reversal.
The diode should be rated to
handle full negative load current for start-up situations, or
the short-circuit current of the positive supply if supply-to-
supply shorts must be tolerated.
Input Voltage Lower Than Output
Linear Technology’s positive low dropout regulators
LT1121 and LT1129, will not draw large currents if the
input voltage is less than the output. These devices use a
lateral PNP power transistor structure that has 40V emitter
base breakdown voltage.
The LT1175, however, uses an
INPUT
RIPPLE
100mV/DIV
f = 100kHz
C
OUT
= 4.7µF TANT
OUTPUT
20mV/DIV
C
OUT
= 1µF TANT
10
U
W
U
U
NPN power transistor structure that has a parasitic diode
between the input and output of the regulator.
Reverse
voltages between input and output above 1V will damage
the regulator if large currents are allowed to flow. Simply
disconnecting the input source with the output held up will
not cause damage even though the input-to-output volt-
age will become slightly reversed.
High Frequency Ripple Rejection
The LT1175 will sometimes be powered from switching
regulators that generate the unregulated or quasi-regu-
lated input voltage. This voltage will contain high fre-
quency ripple that must be rejected by the linear regulator.
Special care was taken with the LT1175 to maximize high
frequency ripple rejection, but as with any micropower
design, rejection is strongly affected by ripple frequency.
The graph in the Typical Performance Characteristics
section shows 60dB rejection at 1kHz, but only 15dB
rejection at 100kHz for the 5V part. Photographs in Figures
4a and 4b show actual output ripple waveforms with
square wave and triwave input ripple.
INPUT
RIPPLE
100mV/DIV
f = 50kHz
5µs/DIV
1175 F04
Figure 4a.
OUTPUT
100mV/DIV
C
OUT
= 4.7µF TANT
C
OUT
= 1µF TANT
2µs/DIV
1175 F04
Figure 4b.
1175fd
LINER [ LINEAR TECHNOLOGY ]
