LT3590
PIN FUNCTIONS (SC70/DFN)
SW (Pin 1/Pin 3): Switch Pin. Minimize trace area at this
pin to minimize EMI. Connect the inductor at this pin.
VREG (Pin 6/Pin 6): Internally Generated 3.3V Regulated
Output Pin. Must be locally bypassed with a 0.1μF X5R
capacitor.
GND (Pins 2, 3, 4/Pin 2): Ground Pins. All ground pins
should be tied directly to local ground plane. Proper
soldering of these pins to the PCB ground is required to
achieve the rated thermal performance.
LED (Pin 7/Pin 5): Connection point for the anode of the
highest LED and the sense resistor.
V
(Pin 8/Pin 4): Input Supply Pin. Must be locally by-
IN
CTRL (Pin 5/Pin 1): Dimming and Shutdown Pin.
Connect it below 100mV to disable the switcher. As the
pin voltage is ramped from 0V to 1.5V, the feedback volt-
passed.
Exposed Pad (NA/Pin 7): Ground. The Exposed Pad
should be soldered to the PCB ground to achieve the
rated thermal performance.
age (V -V ) ramps from 0mV to 200mV, controlling
IN LED
the LBD current.
V − VLED
IN
ILED
=
R1
BLOCK DIAGRAM
V
48V
IN
V
IN
R1
6.8Ω
C1
1μF
–
+
+
–
A = 6.25
–
+
+
LED
REG
EAMP
C2
1μF
VREG
C3
0.1μF
VREF
1.25V
L1
470μH
START-UP
CONTROL
SW
–
+
V
OUT
R
Q
PWM
S
+
–
ISNS
∑
RAMP
GENERATOR
850kHz
OSCILLATOR
CTRL
GND
3590 F01
CONTROL
Figure 1. Block Diagram
3590f
6
Linear [ Linear ]
