LTC1863/LTC1867
PI FU CTIO S
CHO-CH7/COM (Pins 1-8):
Analog Input Pins. Analog
inputs must be free of noise with respect to GND. CH7/
COM can be either a separate channel or the common
minus input for the other channels.
REFCOMP (Pin 9):
Reference Buffer Output Pin. Bypass to
GND with 10µF tantalum capacitor in parallel with 0.1µF
ceramic capacitor (4.096V Nominal). To overdrive
REFCOMP, tie V
REF
to GND.
V
REF
(Pin 10):
2.5V Reference Output. This pin can also be
used as an external reference buffer input for improved
accuracy and drift. Bypass to GND with 2.2µF tantalum
capacitor in parallel with 0.1µF ceramic capacitor.
CS/CONV (Pin 11):
This input provides the dual function
of initiating conversions on the ADC and also frames the
serial data transfer.
SCK (Pin 12):
Shift Clock. This clock synchronizes the
serial data transfer.
SDO (Pin 13):
Digital Data Output. The A/D conversion
result is shifted out of this output. Straight binary format
for unipolar mode and two’s complement format for
bipolar mode.
SDI (Pin 14):
Digital Data Input Pin. The A/D configuration
word is shifted into this input.
GND (Pin 15):
Analog and Digital GND.
V
DD
(Pin 16):
Analog and Digital Power Supply. Bypass to
GND with 10µF tantalum capacitor in parallel with 0.1µF
ceramic capacitor.
TYPICAL CO
ECTIO
DIAGRA
±2.048V
DIFFERENTIAL
INPUTS
+
–
CH0
CH1
CH2
CH3
4.096V
SINGLE-ENDED
INPUT
+
CH4
CH5
CH6
CH7/COM
TEST CIRCUITS
Load Circuits for Access Timing
5V
3k
DN
3k
C
L
DN
C
L
DN
3k
C
L
DN
C
L
(A) Hi-Z TO VOH AND VOL TO VOH
(B) Hi-Z TO VOL AND VOH TO VOL
18637 TC01
U
U
U
UU
U
U
U
V
DD
GND
SDI
LTC1863/
SDO
LTC1867
SCK
CS/CONV
V
REF
REFCOMP
5V
DIGITAL
I/O
2.5V
2.2µF
4.096V
10µF
18637 TCD
Load Circuits for Output Float Delay
5V
3k
(A) VOH TO Hi-Z
(B) VOL TO Hi-Z
18637 TC02
18637f
7
LINER [ LINEAR TECHNOLOGY ]
