LTC1052/LTC7652
THEORY OF OPERATIO
power supply are also nulled. For nulling to take place, the
offset voltage, common mode voltage and power supply
must not change at a frequency which is high compared to
the frequency response of the nulling loop.
AC OPERATION AND ALIASING ERRORS
So far, the DC performance of the LTC1052 has been
explained. As the input signal frequency increases, the
problem of aliasing must be addressed. Aliasing is the
spurious formation of low and high frequency signals
caused by the mixing of the input signal with the sampling
frequency, f
S
. The frequency of the error signals, f
E
, is:
f
E
= f
S
±f
I
where f
I
= input signal frequency.
Normally it is the difference frequency (f
S
– f
I
) which is of
concern because the high frequency (f
S
+ f
I
) can be easily
filtered. As the input frequency approaches the sampling
frequency, the difference frequency approaches zero and
will cause DC errors—the exact problem that the zero-drift
amplifier is meant to eliminate.
The solution is simple; filter the input so the sampling loop
never sees any frequency near the sampling frequency.
At a frequency well below the sampling frequency, the
LTC1052 forces I
1
to equal I
2
(see Figure 1b). This makes
δ
l zero, thus the gain of the sampling loop zero at this and
higher frequencies (i.e., a low pass filter). The corner
frequency of this low pass filter is set by the output stage
pole (1/R
L4
g
m5
R
L5
C2).
S3
V
REF
+ IN
S1
+
g
m1
+
–
–
R
L1
g
m2
R
L2
V
NULL
g
m3
– IN
–
–
g
m6
+
U
For frequencies above this pole, I
2
is:
I
2
= V
IN
g
m6
• 1 • SC1
SC2
and
C1
I
1
– I
2
= V
IN
g
m1
– V
IN
g
m6
•
C2
The LTC1052 is very carefully designed so that g
m1
= g
m6
and C1 = C2. Substituting these values in the above equa-
tion shows I
1
– I
2
= 0.
The g
m6
input stage, with Cl and C2, not only filters the
input to the sampling loop, but also acts as a high
frequency path to give the LTC1052 good high frequency
response. The unity-gain cross frequencies for both the
DC path and high frequency path are identical
[f3dB = 1 (g
m1
/C1) = 1 (g
m6
/C2)]
2π
2π
thereby making the frequency response smooth and con-
tinuous while eliminating sampling noise in the output as
the loop transitions from the high gain DC loop to the high
frequency loop.
The typical curves show just how well the amplifier works.
The output spectrum shows that the difference frequency
(f
I
–f
S
= 100Hz) is down by 80dB and the frequency
response curve shows no abnormalities or perturbations.
Also note the well-behaved small and large-signal step
responses and the absence of the sampling frequency in
the output spectrum. If the dynamics of the amplifier
(i.e., slew rate and overshoot), depend on the sampling
clock, the sampling frequency will appear in the output
spectrum.
C1
C2
S2
g
m4
C
EXT B
C
EXT A
+
–
+
R
L4
g
m5
V
OUT
R
L5
V–
LTC1052/7652 • TPC13
Figure 1a. LTC1052 Block Diagram
Auto Zero Cycle
1052fa
7
LINER [ LINEAR TECHNOLOGY ]
