LTM4641
APPLICATIONS INFORMATION—SAFETY AND LAYOUT GUIDANCE
The majority of C
should be located close to
Safety Considerations
OUT(MLCC)
the load to provide high quality bypassing.
The LTM4641 modules do not provide galvanic isolation
•ꢀ Toꢀminimizeꢀtheꢀviaꢀconductionꢀlossꢀandꢀreduceꢀmoduleꢀ
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
from V to V . There is no internal fuse. If fusing is
IN
OUT
required,aslowblowfusewitharatingtwicethemaximum
input current needs to be provided. The LTM4641 sup-
ports overcurrent protection and two kinds of overvoltage
protection (see the Power Good Indicator and Latching
Output Overvoltage Protection section).
•ꢀ Doꢀnotꢀputꢀviasꢀdirectlyꢀunderꢀanyꢀpads,ꢀunlessꢀtheyꢀ
are capped or plated over.
•ꢀ UseꢀaꢀseparatedꢀSGNDꢀgroundꢀcopperꢀareaꢀforꢀcompo-
nentsconnectingtosignalpins.Componentsconnecting
to SGND should be placed as close to the module as
possible and routed with minimum trace lengths and
trace widths, for best noise immunity.
Layout Checklist/Eꢂaꢃple
The high integration of LTM4641 makes the PCB board
layout very straightforward. To optimize its electrical and
thermal performance, some layout considerations are
necessary. Figure 43 and Figure 44 show recommended
layouts for the circuits shown in Figure 45 and Figure 46,
respectively.
•ꢀ NoteꢀthatꢀthereꢀareꢀtwoꢀclustersꢀofꢀSGNDꢀpinsꢀonꢀtheꢀ
module: one, formed by Pins A1-A3, B1-B3, C1-C4
(A1-quadrant); and a second formed by Pins K1, K3,
L3, and M1-M3 (M1-quadrant). It is good PCB design
practice to provide a copper plane connecting all
A1-quadrant SGND pins together and another plane
connecting all M1-quadrant SGND pins together. It is
not necessary to connect these two clusters of SGND
copper planes to each other in the PCB layout, because
all SGND pins are electrically connected to each other
internal to the module.
•ꢀ Referꢀtoꢀtheꢀfollowingꢀdocumentꢀforꢀdeviceꢀlandꢀpatternꢀ
and stencil design: http://www.linear.com/docs/40146.
•ꢀ TheꢀgerberꢀfileꢀforꢀdemoꢀboardꢀDC1543ꢀcanꢀbeꢀdown-
loaded at http://www.linear.com/demo
•ꢀ UseꢀaꢀsolidꢀcopperꢀGNDꢀplaneꢀdirectlyꢀunderneathꢀtheꢀ
module. This will help form the return path electrical
connections to the input source and output load. It will
also provide a thermal path for removing heat from the
BGA package and minimize junction temperature rise
of the LTM4641 for a given application. For consistent
rippleandnoisefromapplicationtoapplication,connect
the output GND plane (the one that conducts load side
return current back to the module) and the input GND
plane (the one that conducts module return current
back to the input source) underneath the module, only.
•ꢀ Doꢀnot connect the any SGND pins or SGND plane(s)
to the GND plane; the electrical star connection is made
internal to the module.
•ꢀ Forꢀ parallelꢀ moduleꢀ operation,ꢀ seeꢀ theꢀ Multimoduleꢀ
Parallel Operation section for a list of interconnecting
pins across paralleled modules. Circuit Figures 56 and
66 show four and two LTM4641 devices operating in
parallel, respectively. Route signal-level (non-power)
nets on an internal layer, with GND planes overlapping
signal routes to shield them from noise. It is even
more effective to surround module-to-module signal
connections on the internal layer containing the signal
routeswithadjacentGNDplanesorroutes, andperiodi-
cally “punching-through” GND via connections to GND
plane shields on adjacent layers. This practice forms
the equivalent of a “coaxial cable” structure within the
PCB,andishighlyeffectiveatshieldingsensitivesignals
from noise sources. Maintain differential routing of the
•ꢀ UseꢀlargeꢀPCBꢀcopperꢀareasꢀforꢀhighꢀcurrentꢀpaths,ꢀ
including V and V
.
INH
OUT
•ꢀ Placeꢀhighꢀfrequencyꢀceramicꢀinputꢀandꢀoutputꢀcapaci-
tors next to the V , GND and V
pins to minimize
INH
OUT
high frequency noise. V exception: If MSP is used,
INH
(1) place MSP as close to the V pins of the LTM4641
INH
as possible and (2) bypass the drain of MSP—and not
V
—to GND pins of the LTM4641. Only one or two
INH
high frequency MLCCs (C
) need be placed
OUT(MLCC)
directly next to the V
to minimize high frequency noise close to the source.
and GND pins of the LTM4641,
OUT
+
–
V
/V
OSNS
pin pair.
OSNS
4641f
46
Linear [ Linear ]
