LTM8027
applicaTions inForMaTion
V
SUPPLY
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an under damped tank circuit, and the volt-
R
A
RUN PIN
age at the V pin of the LTM8027 can ring to twice the
IN
R
B
nominal input voltage, possibly exceeding the LTM8027’s
rating and damaging the part. If the input supply is poorly
controlledortheuserwillbepluggingtheLTM8027intoan
energizedsupply, theinputnetworkshouldbedesignedto
prevent this overshoot by introducing a damping element
into the path of current flow. This is often done by add-
ing an inexpensive electrolytic bulk capacitor across the
input terminals of the LTM8027. The criteria for selecting
this capacitor is that the ESR is high enough to damp
the ringing, and the capacitance value is several times
larger than the LTM8027 ceramic input capacitor. The bulk
capacitor does not need to be located physically close to
the LTM8027; it should be located close to the application
board’s input connector, instead.
8027 F02
Figure 2. Undervoltage Lockout Resistive Divider
Example: Select R = 49.9k, V
= 14.5V (based upon
B
IN(ON)
a 15V minimum input voltage)
14.5V
1.4V
RA = 49.9k •
–1 = 464k
The V turn off voltage is 15% below turn on. In the
IN
example the V
would be 12.3V. The shutdown func-
IN(OFF)
tion can be disabled by connecting the RUN pin to the V
IN
pin through a large value pull-up resistor, (R ). This pin
PU
contains a low impedance clamp at 6V, so the RUN pin
Synchronization
will sink current from the R pull-up resistor:
PU
The oscillator can be synchronized to an external clock.
V – 6V
RPU
IN
ChoosetheR resistorsuchthattheresultantfrequencyis
T
IRUN
=
atleast10%belowthedesiredsynchronizationfrequency.
It is recommended that the SYNC pin be driven with a
square wave that has amplitude greater than 2.3V, pulse
width greater than 1µs and rise time less than 500ns. The
rising edge of the sync wave form triggers the discharge
of the internal oscillator capacitor.
Because this arrangement will clamp the RUN pin to 6V,
it will violate the 5V absolute maximum voltage rating of
the pin. This is permitted, however, as long as the absolute
maximum input current rating of 1mA is not exceeded.
Input RUN pin currents of <100µA are recommended: a
1M or greater pull-up resistor is typically used for this
configuration.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8027. The LTM8027 is neverthe-
less a switching power supply, and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8027. However, these capacitors
can cause problems if the LTM8027 is plugged into a live
supply (see Linear Technology Application Note 88 for
8027fb
14
Linear [ Linear ]
