LT3975
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Load Transient: 0.5A to 2.5A
Load Transient: 20mA to 2A
I
I
L
1A/DIV
L
1A/DIV
V
V
OUT
OUT
200mV/DIV
200mV/DIV
3975 G37
3975 G38
12V
20µs/DIV
20µs/DIV
12V
IN
OUT
= 47µF
IN
OUT
= 47µF
3.3V
C
3.3V
C
OUT
OUT
PIN FUNCTIONS
FB (Pin 1): The LT3975 regulates the FB pin to 1.197V.
Connect the feedback resistor divider tap to this pin. Also,
connectaphaseleadcapacitorbetweenFBandtheoutput.
Typically, this capacitor is 10pF.
V (Pins 10, 11, 12): The V pin supplies current to the
IN IN
LT3975’sinternalcircuitryandtotheinternalpowerswitch.
These pins must be locally bypassed.
EN (Pin 13): The part is in shutdown when this pin is low
and active when this pin is high. The hysteretic threshold
voltage is 1.08V going up and 1.02V going down. The
SS (Pin 2): A capacitor is tied between SS and ground to
slowly ramp up the peak current limit of the LT3975 on
start-up. There is an internal 1.8μA pull-up on this pin.
The soft-start capacitor is actively discharged when the
EN pin goes low, during undervoltage lockout or thermal
shutdown. Float this pin to disable soft-start.
EN threshold is only accurate when V is above 4.3V. If
IN
V
is lower than 3.9V, internal UVLO will place the part
in shutdown. Tie to V if shutdown feature is not used.
IN
IN
RT (Pin 14): A resistor is tied between RT and ground to
set the switching frequency.
OUT(Pin3):Thispinisaninputtothedropoutcomparator
which maintains a minimum dropout of 500mV between
PG (Pin 15): The PG pin is the open-drain output of an
internal comparator. PGOOD remains low until the FB pin
is within 8.4% of the final regulation voltage. PGOOD is
V
and OUT. The OUT pin connects to the anode of the
IN
internal boost diode. This pin also supplies the current to
the LT3975’s internal regulator when OUT is above 3.2V.
Connect this pin to the output when the programmed
output voltage is less than 16V.
valid when V is above 2V.
IN
SYNC (Pin 16): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode operation
at low output loads. Tie to a clock source for synchroni-
zation, which will include pulse skipping at low output
loads. When in pulse-skipping mode, quiescent current
increases to 11µA in a typical application at no load. Do
not float this pin.
BOOST (Pin 4): This pin is used to provide a drive volt-
age, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pins 5, 6, 7): The SW pin is the output of an internal
power switch. Connect these pins to the inductor, catch
diode, and boost capacitor.
GND (Exposed Pad Pin 17): Ground. The exposed pad
must be soldered to the PCB.
NC(Pins8,9):NoConnects.Thesepinsarenotconnected
to internal circuitry.
3975f
8
Linear [ Linear ]
