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3517FE 参数 Datasheet PDF下载

3517FE图片预览
型号: 3517FE
PDF下载: 下载PDF文件 查看货源
内容描述: 全功能的LED驱动器,具有1.5A电流开关 [Full-Featured LED Driver with 1.5A Switch Current]
分类和应用: 驱动器开关
文件页数/大小: 20 页 / 274 K
品牌: Linear [ Linear ]
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LT3517  
PIN FUNCTIONS  
SW: Switch Pin. Minimize trace at this pin to reduce  
EMI.  
CTRL: LED Current Adjustment Pin. Sets voltage across  
sense resistor between ISP and ISN. Connect directly to  
V
forfull-scalethresholdof100mV,orusesignalvalues  
REF  
V : Input Supply Pin. Must be locally bypassed.  
IN  
betweenGNDand1VtomodulateLEDcurrent.TietheCTRL  
pin to the V pin if not used.  
SHDN: Shutdown Pin. Tie to 1.5V or higher to enable  
device or 0.4V or less to disable device.  
REF  
V : g Error Amplifier Output Pin. Stabilize the loop with  
C
m
V
: Reference Output Pin. This pin can supply up to  
REF  
100μA.  
an RC network or compensating C.  
FB: Voltage Loop Feedback Pin. Works as overvoltage  
protection for LED drivers. If FB is higher than 1V, the  
main switch is turned off.  
R : Switching Frequency Adjustment Pin. Set switching  
T
frequencyusingaresistortoGND(seeTypicalPerformance  
Characteristics for values). For SYNC function, choose  
the resistor to program a frequency 20% slower than the  
SYNC pulse frequency. Do not leave this pin open.  
TGEN: Top Gate Enable Input Pin. Tie to 1.5V or higher  
to enable the PMOS driver function. Tie the TGEN pin to  
ground if TG function is not used. There is an equivalent  
40k resistor from TGEN pin to ground internally.  
SYNC: Frequency Synchronization Pin. Tie an external  
clock signal here. R resistor should be chosen to pro-  
T
ISN: Current Sense (–) Pin. The inverting input to the  
current sense amplifier.  
gram a switching frequency 20% slower than SYNC pulse  
frequency.Synchronization(powerswitchturn-on)occurs  
a fixed delay after the rising edge of SYNC. Tie the SYNC  
pin to ground if this feature is not used.  
ISP: Current Sense (+) Pin. The noninverting input to the  
current sense amplifier. Also serves as positive rail for  
TG pin driver.  
SS: Soft-Start Pin. Place a soft-start capacitor here. Leave  
the pin open if not in use.  
TG: Top Gate Driver Output. An inverted PWM sig-  
nal drives series PMOS device between V  
and  
ISP  
PWM: Pulse Width Modulated Input Pin. Signal low turns  
(V – 7V). An internal 7V clamp protects the PMOS gate.  
ISP  
off channel, disables the main switch and makes the TG  
Leave TG unconnected if not used.  
pin high. Tie the PWM pin to V pin or SHDN pin if not  
REF  
used. There is an equivalent 50k resistor from PWM pin  
Ground: Exposed Pad. Solder paddle directly to ground  
plane.  
to ground internally.  
3517fa  
6
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